From e1b9a815dd34b8c2ff9db1225d3553eab287ba1b Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Fri, 19 Nov 2010 18:00:39 -0600
Subject: SCons: Support building without an ISA

---
 src/mem/SConscript                | 10 ++++++----
 src/mem/cache/SConscript          |  3 +++
 src/mem/cache/prefetch/SConscript |  3 +++
 src/mem/cache/tags/SConscript     |  3 +++
 src/mem/ruby/SConscript           |  3 +++
 5 files changed, 18 insertions(+), 4 deletions(-)

(limited to 'src/mem')

diff --git a/src/mem/SConscript b/src/mem/SConscript
index 46de3eb57..52c530732 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -33,21 +33,23 @@ Import('*')
 SimObject('Bridge.py')
 SimObject('Bus.py')
 SimObject('MemObject.py')
-SimObject('PhysicalMemory.py')
 
 Source('bridge.cc')
 Source('bus.cc')
-Source('dram.cc')
 Source('mem_object.cc')
 Source('packet.cc')
-Source('physical.cc')
 Source('port.cc')
 Source('tport.cc')
 Source('mport.cc')
 
+if env['TARGET_ISA'] != 'no':
+    SimObject('PhysicalMemory.py')
+    Source('dram.cc')
+    Source('physical.cc')
+
 if env['FULL_SYSTEM']:
     Source('vport.cc')
-else:
+elif env['TARGET_ISA'] != 'no':
     Source('page_table.cc')
     Source('translating_port.cc')
 
diff --git a/src/mem/cache/SConscript b/src/mem/cache/SConscript
index 3b8bdb0c8..781521d3f 100644
--- a/src/mem/cache/SConscript
+++ b/src/mem/cache/SConscript
@@ -30,6 +30,9 @@
 
 Import('*')
 
+if env['TARGET_ISA'] == 'no':
+    Return()
+
 SimObject('BaseCache.py')
 
 Source('base.cc')
diff --git a/src/mem/cache/prefetch/SConscript b/src/mem/cache/prefetch/SConscript
index 7314b5ccf..9d05a8ee4 100644
--- a/src/mem/cache/prefetch/SConscript
+++ b/src/mem/cache/prefetch/SConscript
@@ -30,6 +30,9 @@
 
 Import('*')
 
+if env['TARGET_ISA'] == 'no':
+    Return()
+
 Source('base.cc')
 Source('ghb.cc')
 Source('stride.cc')
diff --git a/src/mem/cache/tags/SConscript b/src/mem/cache/tags/SConscript
index 37ed5dc85..d640a9f13 100644
--- a/src/mem/cache/tags/SConscript
+++ b/src/mem/cache/tags/SConscript
@@ -30,6 +30,9 @@
 
 Import('*')
 
+if env['TARGET_ISA'] == 'no':
+    Return()
+
 Source('base.cc')
 Source('fa_lru.cc')
 Source('iic.cc')
diff --git a/src/mem/ruby/SConscript b/src/mem/ruby/SConscript
index 1f7509df4..339787a22 100644
--- a/src/mem/ruby/SConscript
+++ b/src/mem/ruby/SConscript
@@ -37,6 +37,9 @@ import SCons
 
 Import('*')
 
+if env['TARGET_ISA'] == 'no':
+    Return()
+
 if not env['RUBY']:
     Return()
 
-- 
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