From 0dfc29a023ff407846ea4f200547e2b2d9de9c1a Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Mon, 7 May 2007 14:42:03 -0400 Subject: fix partial writes with a functional memory hack figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached configs/common/FSConfig.py: src/mem/bridge.cc: src/mem/bridge.hh: src/python/m5/objects/Bridge.py: fix partial writes with a functional memory hack src/mem/bus.cc: src/mem/bus.hh: src/python/m5/objects/Bus.py: figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached src/mem/packet.cc: fix WriteInvalidateResp to not be a request that needs a response since it isn't src/mem/port.hh: by default return 0 for deviceBlockSize instead of panicing. This makes finding the block size the bus should use easier --HG-- extra : convert_revision : 3fcfe95f9f392ef76f324ee8bd1d7f6de95c1a64 --- src/python/m5/objects/Bridge.py | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/python/m5/objects/Bridge.py') diff --git a/src/python/m5/objects/Bridge.py b/src/python/m5/objects/Bridge.py index ee8e76bff..e123c2891 100644 --- a/src/python/m5/objects/Bridge.py +++ b/src/python/m5/objects/Bridge.py @@ -9,3 +9,5 @@ class Bridge(MemObject): queue_size_b = Param.Int(16, "The number of requests to buffer") delay = Param.Latency('0ns', "The latency of this bridge") write_ack = Param.Bool(False, "Should this bridge ack writes") + fix_partial_write_a = Param.Bool(False, "Should this bridge fixup partial block writes") + fix_partial_write_b = Param.Bool(False, "Should this bridge fixup partial block writes") -- cgit v1.2.3