From e8dc1723ee132f3bc1cb9bb74c0cb0f3e9051cc2 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Mon, 26 Mar 2007 18:40:18 -0400 Subject: first bit of life from the intel gigabit model --HG-- extra : convert_revision : d8944a53f6b585df21651c4e624518d5c49a7837 --- src/python/m5/objects/Ethernet.py | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'src/python/m5/objects') diff --git a/src/python/m5/objects/Ethernet.py b/src/python/m5/objects/Ethernet.py index a52e35511..bfe30950c 100644 --- a/src/python/m5/objects/Ethernet.py +++ b/src/python/m5/objects/Ethernet.py @@ -67,7 +67,14 @@ if build_env['ALPHA_TLASER']: class IGbE(PciDevice): type = 'IGbE' - hardware_address = Param.EthernetAddr(NextEthernetAddr, "Ethernet Hardware Address") + hardware_address = Param.String("Ethernet Hardware Address") + use_flow_control = Param.Bool(False, "Should we use xon/xoff flow contorl (UNIMPLMENTD)") + rx_fifo_size = Param.MemorySize('384kB', "Size of the rx FIFO") + tx_fifo_size = Param.MemorySize('384kB', "Size of the tx FIFO") + rx_desc_cache_size = Param.Int(64, "Number of enteries in the rx descriptor cache") + tx_desc_cache_size = Param.Int(64, "Number of enteries in the rx descriptor cache") + clock = Param.Clock('500MHz', "Clock speed of the device") + class IGbEPciData(PciConfigData): VendorID = 0x8086 -- cgit v1.2.3