From 01c55983737273c70e44e0181e75453e01c5da34 Mon Sep 17 00:00:00 2001
From: Andreas Hansson <andreas.hansson@arm.com>
Date: Mon, 7 Jan 2013 13:05:38 -0500
Subject: mem: Add interleaving bits to the address ranges

This patch adds support for interleaving bits for the address
ranges. What was previously just a start and end address, now has an
additional three fields, for the high bit, and number of bits to use
for interleaving, and a match value to compare against. If the number
of interleaving bits is set to zero it is effectively disabled.

A number of convenience functions are added to the range to enquire
about the interleaving, its granularity and the number of stripes it
is part of.
---
 src/python/m5/params.py | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

(limited to 'src/python')

diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index cabb91b28..b9a205307 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -553,7 +553,15 @@ class AddrRange(ParamValue):
     cxx_type = 'AddrRange'
 
     def __init__(self, *args, **kwargs):
+        # Disable interleaving by default
+        self.intlvHighBit = 0
+        self.intlvBits = 0
+        self.intlvMatch = 0
+
         def handle_kwargs(self, kwargs):
+            # An address range needs to have an upper limit, specified
+            # either explicitly with an end, or as an offset using the
+            # size keyword.
             if 'end' in kwargs:
                 self.end = Addr(kwargs.pop('end'))
             elif 'size' in kwargs:
@@ -561,6 +569,14 @@ class AddrRange(ParamValue):
             else:
                 raise TypeError, "Either end or size must be specified"
 
+            # Now on to the optional bit
+            if 'intlvHighBit' in kwargs:
+                self.intlvHighBit = int(kwargs.pop('intlvHighBit'))
+            if 'intlvBits' in kwargs:
+                self.intlvBits = int(kwargs.pop('intlvBits'))
+            if 'intlvMatch' in kwargs:
+                self.intlvMatch = int(kwargs.pop('intlvMatch'))
+
         if len(args) == 0:
             self.start = Addr(kwargs.pop('start'))
             handle_kwargs(self, kwargs)
@@ -589,7 +605,8 @@ class AddrRange(ParamValue):
         return '%s:%s' % (self.start, self.end)
 
     def size(self):
-        return long(self.end) - long(self.start) + 1
+        # Divide the size by the size of the interleaving slice
+        return (long(self.end) - long(self.start) + 1) >> self.intlvBits
 
     @classmethod
     def cxx_predecls(cls, code):
@@ -605,7 +622,9 @@ class AddrRange(ParamValue):
         # by swig
         from m5.internal.range import AddrRange
 
-        return AddrRange(long(self.start), long(self.end))
+        return AddrRange(long(self.start), long(self.end),
+                         int(self.intlvHighBit), int(self.intlvBits),
+                         int(self.intlvMatch))
 
 # Boolean parameter type.  Python doesn't let you subclass bool, since
 # it doesn't want to let you create multiple instances of True and
-- 
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