From 9305bb6e83d57fde96c78e7b11d50914935f57d5 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 24 Apr 2019 20:11:23 -0700 Subject: arch, sim: Simplify the AuxVector type. The AuxVector type has a bunch of accessors which just give access to the underlying variables through references. We might as well just make those members accessible directly. Also, the AuxVector doesn't need to handle endianness flips itself. We can tell the byteswap mechanism how to flip an AuxVector, and let it handle that for us. This gets rid of the entire .cc file which was complicated by trying to both hide the ISA specific endianness translations, and instantiate templated functions in a .cc. Change-Id: I433cd61e73e0b067b6d628fba31be4a4ec1c4cf0 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18373 Maintainer: Gabe Black Tested-by: kokoro Reviewed-by: Jason Lowe-Power Reviewed-by: Andreas Sandberg --- src/sim/SConscript | 1 - 1 file changed, 1 deletion(-) (limited to 'src/sim/SConscript') diff --git a/src/sim/SConscript b/src/sim/SConscript index 8ab2c72f9..72b0f3df9 100644 --- a/src/sim/SConscript +++ b/src/sim/SConscript @@ -80,7 +80,6 @@ Source('mathexpr.cc') if env['TARGET_ISA'] != 'null': SimObject('InstTracer.py') SimObject('Process.py') - Source('aux_vector.cc') Source('faults.cc') Source('process.cc') Source('fd_array.cc') -- cgit v1.2.3