From 52d521e4337995d417b6f7b68644959edcc0c6b4 Mon Sep 17 00:00:00 2001
From: Mitch Hayenga <mitch.hayenga@arm.com>
Date: Wed, 30 Sep 2015 11:14:19 -0500
Subject: cpu: Change thread assignments for heterogenous SMT

Trying to run an SE system with varying threads per core (SMT cores + Non-SMT
cores) caused failures due to the CPU id assignment logic.  The comment
about thread assignment (worrying about core 0 not having tid 0) seems
not to be valid given that our configuration scripts initialize them in
order.

This removes that constraint so a heterogenously threaded sytem can work.
---
 src/sim/system.cc | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/sim/system.cc')

diff --git a/src/sim/system.cc b/src/sim/system.cc
index d0418d99b..2e74d01c8 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -80,6 +80,7 @@ int System::numSystemsRunning = 0;
 System::System(Params *p)
     : MemObject(p), _systemPort("system_port", this),
       _numContexts(0),
+      multiThread(p->multi_thread),
       pagePtr(0),
       init_param(p->init_param),
       physProxy(_systemPort, p->cache_line_size),
-- 
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