From 41af57f9fbc8220fbac8a3061ddadf4a4d942ebf Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 17 Jan 2012 12:55:07 -0600 Subject: MEM: Add the system port as a central access point The system port is used as a globally reachable access point to the memory subsystem. The benefit of using an actual port is that the usual infrastructure is used to resolve any access and thus makes the overall system able to handle distributed memories in any configuration, and also makes the accesses agnostic to the address map. This patch only introduces the port and does not actually use it for anything. --- src/sim/system.hh | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 58 insertions(+), 2 deletions(-) (limited to 'src/sim/system.hh') diff --git a/src/sim/system.hh b/src/sim/system.hh index 44383c399..9efe37651 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2012 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2002-2005 The Regents of The University of Michigan * Copyright (c) 2011 Regents of the University of California * All rights reserved. @@ -44,9 +56,9 @@ #include "config/full_system.hh" #include "cpu/pc_event.hh" #include "enums/MemoryMode.hh" +#include "mem/mem_object.hh" #include "mem/port.hh" #include "params/System.hh" -#include "sim/sim_object.hh" #if FULL_SYSTEM #include "kern/system_events.hh" @@ -65,10 +77,54 @@ class VirtualPort; class GDBListener; class BaseRemoteGDB; -class System : public SimObject +class System : public MemObject { + private: + + /** + * Private class for the system port which is only used as a + * master for debug access and for non-structural entities that do + * not have a port of their own. + */ + class SystemPort : public Port + { + public: + + /** + * Create a system port with a name and an owner. + */ + SystemPort(const std::string &_name, MemObject *_owner) + : Port(_name, _owner) + { } + bool recvTiming(PacketPtr pkt) + { panic("SystemPort does not receive timing!\n"); return false; } + Tick recvAtomic(PacketPtr pkt) + { panic("SystemPort does not receive atomic!\n"); return 0; } + void recvFunctional(PacketPtr pkt) + { panic("SystemPort does not receive functional!\n"); } + void recvStatusChange(Status status) { } + + }; + + SystemPort _systemPort; + public: + /** + * Get a pointer to the system port that can be used by + * non-structural simulation objects like processes or threads, or + * external entities like loaders and debuggers, etc, to access + * the memory system. + * + * @return a pointer to the system port we own + */ + Port* getSystemPort() { return &_systemPort; } + + /** + * Additional function to return the Port of a memory object. + */ + Port *getPort(const std::string &if_name, int idx = -1); + static const char *MemoryModeStrings[3]; Enums::MemoryMode -- cgit v1.2.3 From f85286b3debf4a4a94d3b959e5bb880be81bd692 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 17 Jan 2012 12:55:08 -0600 Subject: MEM: Add port proxies instead of non-structural ports Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh --- src/sim/system.hh | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'src/sim/system.hh') diff --git a/src/sim/system.hh b/src/sim/system.hh index 9efe37651..eedd11e85 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -71,8 +71,8 @@ class PhysicalMemory; #if FULL_SYSTEM class Platform; -class FunctionalPort; -class VirtualPort; +class PortProxy; +class FSTranslatingPortProxy; #endif class GDBListener; class BaseRemoteGDB; @@ -110,6 +110,12 @@ class System : public MemObject public: + /** + * After all objects have been created and all ports are + * connected, check that the system port is connected. + */ + virtual void init(); + /** * Get a pointer to the system port that can be used by * non-structural simulation objects like processes or threads, or @@ -175,8 +181,8 @@ class System : public MemObject /** Port to physical memory used for writing object files into ram at * boot.*/ - FunctionalPort *functionalPort; - VirtualPort *virtPort; + PortProxy* physProxy; + FSTranslatingPortProxy* virtProxy; /** kernel symbol table */ SymbolTable *kernelSymtab; -- cgit v1.2.3 From 07cf9d914b292008ead7021182ec2ef8fc4671f1 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Tue, 17 Jan 2012 12:55:09 -0600 Subject: MEM: Separate queries for snooping and address ranges This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges. --- src/sim/system.hh | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src/sim/system.hh') diff --git a/src/sim/system.hh b/src/sim/system.hh index eedd11e85..53f1762c7 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -102,7 +102,13 @@ class System : public MemObject { panic("SystemPort does not receive atomic!\n"); return 0; } void recvFunctional(PacketPtr pkt) { panic("SystemPort does not receive functional!\n"); } - void recvStatusChange(Status status) { } + + /** + * The system port is a master port connected to a single + * slave and thus do not care about what ranges the slave + * covers (as there is nothing to choose from). + */ + void recvRangeChange() { } }; -- cgit v1.2.3