From 07969dbbf1a737e666b5ba6d34cd7cf2b403a9ad Mon Sep 17 00:00:00 2001
From: Lisa Hsu <hsul@eecs.umich.edu>
Date: Wed, 5 Nov 2008 15:30:49 -0500
Subject: Right now a single thread cpu 1 could get assigned context Id != 1,
 depending on the order in which it's registered with the system.  To make
 them match, here is a little change.

---
 src/sim/system.cc | 20 +++++++++++++-------
 src/sim/system.hh |  2 +-
 2 files changed, 14 insertions(+), 8 deletions(-)

(limited to 'src/sim')

diff --git a/src/sim/system.cc b/src/sim/system.cc
index 9704c83f0..29b1d1f61 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -166,16 +166,22 @@ bool System::breakpoint()
 }
 
 int
-System::registerThreadContext(ThreadContext *tc)
+System::registerThreadContext(ThreadContext *tc, int assigned)
 {
     int id;
-    for (id = 0; id < threadContexts.size(); id++) {
-        if (!threadContexts[id])
-            break;
-    }
+    if (assigned == -1) {
+        for (id = 0; id < threadContexts.size(); id++) {
+            if (!threadContexts[id])
+                break;
+        }
 
-    if (threadContexts.size() <= id)
-        threadContexts.resize(id + 1);
+        if (threadContexts.size() <= id)
+            threadContexts.resize(id + 1);
+    } else {
+        if (threadContexts.size() <= assigned)
+            threadContexts.resize(assigned + 1);
+        id = assigned;
+    }
 
     if (threadContexts[id])
         panic("Cannot have two CPUs with the same id (%d)\n", id);
diff --git a/src/sim/system.hh b/src/sim/system.hh
index e993a7a50..9715767b1 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -224,7 +224,7 @@ class System : public SimObject
 
 #endif // FULL_SYSTEM
 
-    int registerThreadContext(ThreadContext *tc);
+    int registerThreadContext(ThreadContext *tc, int assigned=-1);
     void replaceThreadContext(ThreadContext *tc, int context_id);
 
     void serialize(std::ostream &os);
-- 
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