From 0c99d21ad748371e801508a8c3652e07e2e56f93 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Tue, 25 Sep 2012 11:49:40 -0500
Subject: ARM: Squash outstanding walks when instructions are squashed.

---
 src/sim/tlb.hh | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'src/sim')

diff --git a/src/sim/tlb.hh b/src/sim/tlb.hh
index 379cdd343..0b89c9bd0 100644
--- a/src/sim/tlb.hh
+++ b/src/sim/tlb.hh
@@ -94,6 +94,13 @@ class BaseTLB : public SimObject
          */
         virtual void finish(Fault fault, RequestPtr req, ThreadContext *tc,
                             Mode mode) = 0;
+
+        /** This function is used by the page table walker to determine if it
+         * should translate the a pending request or if the underlying request
+         * has been squashed.
+         * @ return Is the instruction that requested this translation squashed?
+         */
+        virtual bool squashed() const { return false; }
     };
 };
 
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