From 39896bd265cfab20ab512cf4bceed7b38eca9d91 Mon Sep 17 00:00:00 2001
From: Gabe Black <gabeblack@google.com>
Date: Thu, 2 May 2019 01:33:31 -0700
Subject: cpu, sim: Return PortProxy &s from all the proxy accessors.

This is a step towards merging the accessors for SE and FS modes.

Change-Id: I76818ab88b97097ac363e243be9cc1911b283090
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18579
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
---
 src/sim/process.cc | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'src/sim')

diff --git a/src/sim/process.cc b/src/sim/process.cc
index f647467b8..81f2cd6aa 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -161,7 +161,9 @@ Process::clone(ThreadContext *otc, ThreadContext *ntc,
          */
         delete np->pTable;
         np->pTable = pTable;
-        ntc->getMemProxy().setPageTable(np->pTable);
+        auto &proxy = dynamic_cast<SETranslatingPortProxy &>(
+                ntc->getMemProxy());
+        proxy.setPageTable(np->pTable);
 
         np->memState = memState;
     } else {
-- 
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