From 59bf0e7eb41494b7de033aa4737da026adddc215 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 11 Feb 2011 18:29:35 -0600 Subject: Timesync: Make sure timesync event is setup after curTick is unserialized Setup initial timesync event in initState or loadState so that curTick has been updated to the new value, otherwise the event is scheduled in the past. --- src/sim/root.cc | 13 ++++++++++++- src/sim/root.hh | 17 ++++++++++++++++- 2 files changed, 28 insertions(+), 2 deletions(-) (limited to 'src/sim') diff --git a/src/sim/root.cc b/src/sim/root.cc index 1dc9b6058..d51fcbda6 100644 --- a/src/sim/root.cc +++ b/src/sim/root.cc @@ -108,7 +108,18 @@ Root::Root(RootParams *p) : SimObject(p), _enabled(false), assert(_root == NULL); _root = this; lastTime.setTimer(); - timeSyncEnable(p->time_sync_enable); +} + +void +Root::initState() +{ + timeSyncEnable(params()->time_sync_enable); +} + +void +Root::loadState(Checkpoint *cp) +{ + timeSyncEnable(params()->time_sync_enable); } Root * diff --git a/src/sim/root.hh b/src/sim/root.hh index 2beced9d4..76a508c19 100644 --- a/src/sim/root.hh +++ b/src/sim/root.hh @@ -95,7 +95,22 @@ class Root : public SimObject /// Set the threshold for time remaining to spin wait. void timeSyncSpinThreshold(Time newThreshold); - Root(RootParams *p); + typedef RootParams Params; + const Params * + params() const + { + return dynamic_cast(_params); + } + + Root(Params *p); + + /** Schedule the timesync event at loadState() so that curTick is correct + */ + void loadState(Checkpoint *cp); + + /** Schedule the timesync event at initState() when not unserializing + */ + void initState(); }; #endif // __SIM_ROOT_HH__ -- cgit v1.2.3 From e2507407b17188dca802082434cfe0230d9bfa61 Mon Sep 17 00:00:00 2001 From: Giacomo Gabrielli Date: Fri, 11 Feb 2011 18:29:35 -0600 Subject: O3: Enhance data address translation by supporting hardware page table walkers. Some ISAs (like ARM) relies on hardware page table walkers. For those ISAs, when a TLB miss occurs, initiateTranslation() can return with NoFault but with the translation unfinished. Instructions experiencing a delayed translation due to a hardware page table walk are deferred until the translation completes and kept into the IQ. In order to keep track of them, the IQ has been augmented with a queue of the outstanding delayed memory instructions. When their translation completes, instructions are re-executed (only their initiateAccess() was already executed; their DTB translation is now skipped). The IEW stage has been modified to support such a 2-pass execution. --- src/sim/tlb.hh | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/sim') diff --git a/src/sim/tlb.hh b/src/sim/tlb.hh index 1512bc0fa..253f12072 100644 --- a/src/sim/tlb.hh +++ b/src/sim/tlb.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2011 ARM Limited + * All rights reserved. + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2006 The Regents of The University of Michigan * All rights reserved. * @@ -64,6 +76,12 @@ class BaseTLB : public SimObject virtual ~Translation() {} + /** + * Signal that the translation has been delayed due to a hw page table + * walk. + */ + virtual void markDelayed() = 0; + /* * The memory for this object may be dynamically allocated, and it may * be responsible for cleaning itself up which will happen in this -- cgit v1.2.3 From ded4d319f275aa6e1518f760d67b9e0519b31565 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 11 Feb 2011 18:29:35 -0600 Subject: Serialization: Allow serialization of stl lists --- src/sim/serialize.cc | 56 +++++++++++++++++++++++++++++++++++++++++++++++++++- src/sim/serialize.hh | 8 ++++++++ 2 files changed, 63 insertions(+), 1 deletion(-) (limited to 'src/sim') diff --git a/src/sim/serialize.cc b/src/sim/serialize.cc index d28f335be..44fe7b2e7 100644 --- a/src/sim/serialize.cc +++ b/src/sim/serialize.cc @@ -201,6 +201,23 @@ arrayParamOut(ostream &os, const string &name, const vector ¶m) os << "\n"; } +template +void +arrayParamOut(ostream &os, const string &name, const list ¶m) +{ + typename list::const_iterator it = param.begin(); + + os << name << "="; + if (param.size() > 0) + showParam(os, *it); + it++; + while (it != param.end()) { + os << " "; + showParam(os, *it); + it++; + } + os << "\n"; +} template void @@ -326,6 +343,37 @@ arrayParamIn(Checkpoint *cp, const string §ion, } } +template +void +arrayParamIn(Checkpoint *cp, const string §ion, + const string &name, list ¶m) +{ + string str; + if (!cp->find(section, name, str)) { + fatal("Can't unserialize '%s:%s'\n", section, name); + } + param.clear(); + + vector tokens; + tokenize(tokens, str, ' '); + + for (vector::size_type i = 0; i < tokens.size(); i++) { + T scalar_value = 0; + if (!parseParam(tokens[i], scalar_value)) { + string err("could not parse \""); + + err += str; + err += "\""; + + fatal(err); + } + + // assign parsed value to vector + param.push_back(scalar_value); + } +} + + void objParamIn(Checkpoint *cp, const string §ion, const string &name, SimObject * ¶m) @@ -356,7 +404,13 @@ arrayParamOut(ostream &os, const string &name, \ const vector ¶m); \ template void \ arrayParamIn(Checkpoint *cp, const string §ion, \ - const string &name, vector ¶m); + const string &name, vector ¶m); \ +template void \ +arrayParamOut(ostream &os, const string &name, \ + const list ¶m); \ +template void \ +arrayParamIn(Checkpoint *cp, const string §ion, \ + const string &name, list ¶m); INSTANTIATE_PARAM_TEMPLATES(char) INSTANTIATE_PARAM_TEMPLATES(signed char) diff --git a/src/sim/serialize.hh b/src/sim/serialize.hh index 5ea632ea4..6be8ce3b6 100644 --- a/src/sim/serialize.hh +++ b/src/sim/serialize.hh @@ -69,6 +69,10 @@ template void arrayParamOut(std::ostream &os, const std::string &name, const std::vector ¶m); +template +void arrayParamOut(std::ostream &os, const std::string &name, + const std::list ¶m); + template void arrayParamIn(Checkpoint *cp, const std::string §ion, const std::string &name, T *param, unsigned size); @@ -77,6 +81,10 @@ template void arrayParamIn(Checkpoint *cp, const std::string §ion, const std::string &name, std::vector ¶m); +template +void arrayParamIn(Checkpoint *cp, const std::string §ion, + const std::string &name, std::list ¶m); + void objParamIn(Checkpoint *cp, const std::string §ion, const std::string &name, SimObject * ¶m); -- cgit v1.2.3