From eba0ab506bfa33e7810163bc255d0af4a14ac8db Mon Sep 17 00:00:00 2001
From: Gabe Black <gabeblack@google.com>
Date: Fri, 15 Jun 2018 20:02:54 -0700
Subject: systemc: Add some common test include files.
These are "common" in the sense that they're not in a particular test
directory, but I think they're only used by one test.
Change-Id: I4ffd209d04ed0e5253085810913827b87412b302
Reviewed-on: https://gem5-review.googlesource.com/11272
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
---
src/systemc/tests/include/SimpleLTInitiator1.h | 162 +++++++++++++++++++++++++
1 file changed, 162 insertions(+)
create mode 100644 src/systemc/tests/include/SimpleLTInitiator1.h
(limited to 'src/systemc/tests/include/SimpleLTInitiator1.h')
diff --git a/src/systemc/tests/include/SimpleLTInitiator1.h b/src/systemc/tests/include/SimpleLTInitiator1.h
new file mode 100644
index 000000000..6f1271278
--- /dev/null
+++ b/src/systemc/tests/include/SimpleLTInitiator1.h
@@ -0,0 +1,162 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+//====================================================================
+// Nov 06, 2008
+//
+// Updated by:
+// Xiaopeng Qiu, JEDA Technologies, Inc
+// Email: qiuxp@jedatechnologies.net
+//
+// To fix violations of TLM2.0 rules, which are detected by JEDA
+// TLM2.0 checker.
+//
+//====================================================================
+
+#ifndef __SIMPLE_LT_INITIATOR1_H__
+#define __SIMPLE_LT_INITIATOR1_H__
+
+#include "tlm.h" /// TLM definitions
+#include <cassert> /// STD assert ()
+
+class SimpleLTInitiator1 :
+ public sc_core::sc_module,
+ public virtual tlm::tlm_bw_transport_if<>
+{
+public:
+ typedef tlm::tlm_generic_payload transaction_type;
+ typedef tlm::tlm_phase phase_type;
+ typedef tlm::tlm_sync_enum sync_enum_type;
+ typedef tlm::tlm_fw_transport_if<> fw_interface_type;
+ typedef tlm::tlm_bw_transport_if<> bw_interface_type;
+ typedef tlm::tlm_initiator_socket<32> initiator_socket_type;
+
+public:
+ initiator_socket_type socket;
+
+public:
+ SC_HAS_PROCESS(SimpleLTInitiator1);
+ SimpleLTInitiator1(sc_core::sc_module_name name,
+ unsigned int nrOfTransactions = 0x5,
+ unsigned int baseAddress = 0x0) :
+ sc_core::sc_module(name),
+ socket("socket"),
+ mNrOfTransactions(nrOfTransactions),
+ mBaseAddress(baseAddress),
+ mTransactionCount(0)
+ {
+ // Bind this initiator's interface to the initiator socket
+ socket(*this);
+
+ // Initiator thread
+ SC_THREAD(run);
+ }
+
+ bool initTransaction(transaction_type& trans)
+ {
+ if (mTransactionCount < mNrOfTransactions) {
+ trans.set_address(mBaseAddress + 4*mTransactionCount);
+ mData = mTransactionCount;
+ trans.set_command(tlm::TLM_WRITE_COMMAND);
+
+ } else if (mTransactionCount < 2 * mNrOfTransactions) {
+ trans.set_address(mBaseAddress + 4*(mTransactionCount - mNrOfTransactions));
+ mData = 0;
+ trans.set_command(tlm::TLM_READ_COMMAND);
+
+ } else {
+ return false;
+ }
+
+ trans.set_data_ptr(reinterpret_cast<unsigned char*>(&mData));
+ trans.set_data_length(4);
+ trans.set_streaming_width(4);
+ trans.set_dmi_allowed(false);
+ trans.set_response_status(tlm::TLM_INCOMPLETE_RESPONSE);
+
+ ++mTransactionCount;
+ return true;
+ }
+
+ void logStartTransation(transaction_type& trans)
+ {
+ if (trans.get_command() == tlm::TLM_WRITE_COMMAND) {
+ std::cout << name() << ": Send write request: A = 0x"
+ << std::hex << (unsigned int)trans.get_address()
+ << ", D = 0x" << mData << std::dec
+ << " @ " << sc_core::sc_time_stamp() << std::endl;
+
+ } else {
+ std::cout << name() << ": Send read request: A = 0x"
+ << std::hex << (unsigned int)trans.get_address() << std::dec
+ << " @ " << sc_core::sc_time_stamp() << std::endl;
+ }
+ }
+
+ void logEndTransaction(transaction_type& trans)
+ {
+ if (trans.get_response_status() != tlm::TLM_OK_RESPONSE) {
+ std::cout << name() << ": Received error response @ "
+ << sc_core::sc_time_stamp() << std::endl;
+
+ } else {
+ std::cout << name() << ": Received ok response";
+ if (trans.get_command() == tlm::TLM_READ_COMMAND) {
+ std::cout << ": D = 0x" << std::hex << mData << std::dec;
+ }
+ std::cout << " @ " << sc_core::sc_time_stamp() << std::endl;
+ }
+ }
+
+ void run()
+ {
+ transaction_type trans;
+ sc_core::sc_time t(sc_core::SC_ZERO_TIME);
+ while (initTransaction(trans)) {
+ logStartTransation(trans);
+ socket->b_transport(trans, t);
+ wait(t);
+ logEndTransaction(trans);
+ t = sc_core::SC_ZERO_TIME;
+ }
+ wait();
+
+ }
+
+ tlm::tlm_sync_enum nb_transport_bw(transaction_type &,phase_type &,sc_core::sc_time & )
+ {
+ assert(0); // should never happen
+ return tlm::TLM_COMPLETED;
+ }
+
+ void invalidate_direct_mem_ptr(sc_dt::uint64 start_range,
+ sc_dt::uint64 end_range)
+ {
+ // No DMI support: ignore
+ }
+
+private:
+ sc_core::sc_event mEndEvent;
+ unsigned int mNrOfTransactions;
+ unsigned int mBaseAddress;
+ unsigned int mTransactionCount;
+ unsigned int mData;
+};
+
+#endif
--
cgit v1.2.3