From 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 24 May 2018 01:37:55 -0700 Subject: systemc: Import tests from the Accellera systemc distribution. Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini Maintainer: Gabe Black --- .../general/arith/divide/datatypes/common.h | 46 +++++ .../general/arith/divide/datatypes/datatypes.cpp | 105 +++++++++++ .../general/arith/divide/datatypes/datatypes.f | 4 + .../general/arith/divide/datatypes/datatypes.h | 115 ++++++++++++ .../general/arith/divide/datatypes/display.cpp | 54 ++++++ .../general/arith/divide/datatypes/display.h | 81 ++++++++ .../arith/divide/datatypes/golden/datatypes.log | 204 +++++++++++++++++++++ .../general/arith/divide/datatypes/main.cpp | 94 ++++++++++ .../general/arith/divide/datatypes/stimulus.cpp | 86 +++++++++ .../general/arith/divide/datatypes/stimulus.h | 84 +++++++++ .../cae_test/general/arith/divide/divide/common.h | 46 +++++ .../general/arith/divide/divide/display.cpp | 62 +++++++ .../cae_test/general/arith/divide/divide/display.h | 78 ++++++++ .../general/arith/divide/divide/divide.cpp | 129 +++++++++++++ .../cae_test/general/arith/divide/divide/divide.f | 4 + .../cae_test/general/arith/divide/divide/divide.h | 109 +++++++++++ .../general/arith/divide/divide/golden/divide.log | 35 ++++ .../cae_test/general/arith/divide/divide/main.cpp | 98 ++++++++++ .../general/arith/divide/divide/stimulus.cpp | 86 +++++++++ .../general/arith/divide/divide/stimulus.h | 81 ++++++++ 20 files changed, 1601 insertions(+) create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h (limited to 'src/systemc/tests/systemc/misc/cae_test/general/arith/divide') diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h new file mode 100644 index 000000000..335b51334 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector2; +typedef sc_signal > sc_signal_bool_vector3; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp new file mode 100644 index 000000000..1418eba9b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp @@ -0,0 +1,105 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry(){ + + sc_biguint<2> tmp1; + sc_bigint<2> tmp2; + sc_biguint<3> tmp3; + sc_bigint<3> tmp4; + sc_biguint<2> tmp1r; + sc_bigint<2> tmp2r; + sc_biguint<3> tmp3r; + sc_bigint<3> tmp4r; + + // reset_loop + out_valid.write(false); + out_ack.write(false); + wait(); + + // + // main loop + // + + while(1) { + //input handshake + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + // input handshake + out_ack.write(true); + + //execute datatypes operations + // unsigned(2) <- signed(3)/unsigned(2) + tmp1r = tmp4 / tmp1; + // signed(2) <- unsigned(2)/signed(3) + tmp2r = tmp1 / tmp4; + // unsigned(3) <- unsigned(3)/unsigned(2) + tmp3r = tmp3 / tmp1; + // signed(3) <- signed(3)/signed(2) + tmp4r = tmp4 / tmp2; + + // write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + + //output handshake + out_valid.write(true); + wait(); + + //input handshake + out_ack.write(false); + + //output handshake + out_valid.write(false); + wait(); + } +} + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h new file mode 100644 index 000000000..0d58458fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector2& in_value2; // Input port + const sc_signal_bool_vector3& in_value3; // Input port + const sc_signal_bool_vector3& in_value4; // Input port + const sc_signal& in_valid; // Input port + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector2& out_value2; // Output port + sc_signal_bool_vector3& out_value3; // Output port + sc_signal_bool_vector3& out_value4; // Output port + sc_signal& out_ack; // Output port + sc_signal& out_valid; // Output port + + + // + // Constructor + // + + datatypes ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector2& IN_VALUE2, + const sc_signal_bool_vector3& IN_VALUE3, + const sc_signal_bool_vector3& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector2& OUT_VALUE2, + sc_signal_bool_vector3& OUT_VALUE3, + sc_signal_bool_vector3& OUT_VALUE4, + sc_signal& OUT_ACK, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_ack (OUT_ACK), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + +void entry (); + +}; + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp new file mode 100644 index 000000000..649ac74a3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-11 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + wait(); + + while(counter<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << endl; + do { wait(); } while ( in_valid == true); + counter++; + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h new file mode 100644 index 000000000..c4efff539 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector2& in_value2; // Input port + const sc_signal_bool_vector3& in_value3; // Input port + const sc_signal_bool_vector3& in_value4; // Input port + const sc_signal& in_valid; // Input port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector2& IN_VALUE2, + const sc_signal_bool_vector3& IN_VALUE3, + const sc_signal_bool_vector3& IN_VALUE4, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log new file mode 100644 index 000000000..487107cf4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp new file mode 100644 index 000000000..a56c0c05e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector2 stimulus_line1; + sc_signal_bool_vector2 stimulus_line2; + sc_signal_bool_vector3 stimulus_line3; + sc_signal_bool_vector3 stimulus_line4; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector2 result_line1; + sc_signal_bool_vector2 result_line2; + sc_signal_bool_vector3 result_line3; + sc_signal_bool_vector3 result_line4; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + ack, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp new file mode 100644 index 000000000..5f0d4fc1d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-01 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_unsigned tmp1(2); + sc_signed tmp2(2); + sc_unsigned tmp3(3); + sc_signed tmp4(3); + sc_unsigned zero_2(2); + sc_unsigned zero_3(3); + + zero_3 = "000"; + zero_2 = "00"; + tmp1 = "01"; + tmp2 = "10"; + tmp3 = "010"; + tmp4 = "011"; + + + while(true){ + // handshake + out_valid.write(true); + // write stimuli + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + cout << "Stimuli: "<< tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << endl; + // update stimuli + tmp1 = tmp1 + 1; + if (tmp1 == zero_2) tmp1 = "01"; + tmp2 = tmp2 + 1; + if (tmp2 == zero_2) tmp2 = "01"; + tmp3 = tmp3 + 1; + if (tmp3 == zero_3) tmp3 = "001"; + tmp4 = tmp4 + 1; + if (tmp4 == zero_3) tmp4 = "001"; + // handshake + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h new file mode 100644 index 000000000..5e7335244 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset ; + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector2& out_value2; // Output port + sc_signal_bool_vector3& out_value3; // Output port + sc_signal_bool_vector3& out_value4; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector2& OUT_VALUE2, + sc_signal_bool_vector3& OUT_VALUE3, + sc_signal_bool_vector3& OUT_VALUE4, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp new file mode 100644 index 000000000..2a99472b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h new file mode 100644 index 000000000..5902ca652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp new file mode 100644 index 000000000..bc363dc9a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + divide.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "divide.h" + +void divide::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute operations + tmp1 = tmp1/2; + tmp2 = tmp2/2; + tmp3 = tmp3/2; + tmp4 = tmp4/2; + tmp5 = tmp5/2; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute slf assigning operations + tmp1 /= 3; + tmp2 /= 3; + tmp3 /= 3; + tmp4 /= 3; + tmp5 /= 3; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute self assigning operations + if (tmp3!=0) + tmp1 = (tmp2/tmp3).to_int(); + if (tmp4!=0) + tmp2 = tmp2/tmp4; + if (tmp5!=0) + tmp3 = tmp3/tmp5; + if (tmp5!=0) + tmp4 = tmp4/tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f new file mode 100644 index 000000000..2e58a7f37 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f @@ -0,0 +1,4 @@ +divide/stimulus.cpp +divide/display.cpp +divide/divide.cpp +divide/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h new file mode 100644 index 000000000..20be049c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + divide.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( divide ) +{ + SC_HAS_PROCESS( divide ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector4& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector4& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + divide( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log new file mode 100644 index 000000000..e48b2110a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli : 254 -2 14 -2 254 at 18 ns +Display : 127 1111 0111 11111111 01111111 at 22 ns +Display : 42 1111 0010 00000000 00101010 at 25 ns +Display : 0 1111 0000 00000000 00101010 at 28 ns +Stimuli : 253 -3 13 -3 253 at 34 ns +Display : 126 1111 0110 11111111 01111110 at 38 ns +Display : 42 1111 0010 00000000 00101010 at 41 ns +Display : 0 1111 0000 00000000 00101010 at 44 ns +Stimuli : 252 -4 12 -4 252 at 50 ns +Display : 126 1110 0110 11111110 01111110 at 54 ns +Display : 42 1110 0010 00000000 00101010 at 57 ns +Display : 0 1110 0000 00000000 00101010 at 60 ns +Stimuli : 251 -5 11 -5 251 at 66 ns +Display : 125 1110 0101 11111110 01111101 at 70 ns +Display : 41 1110 0001 00000000 00101001 at 73 ns +Display : 0 1110 0000 00000000 00101001 at 76 ns +Stimuli : 250 -6 10 -6 250 at 82 ns +Display : 125 1101 0101 11111101 01111101 at 86 ns +Display : 41 1101 0001 11111111 00101001 at 89 ns +Display : -1 1101 0000 00000000 00101001 at 92 ns +Stimuli : 249 -7 9 -7 249 at 98 ns +Display : 124 1101 0100 11111101 01111100 at 102 ns +Display : 41 1101 0001 11111111 00101001 at 105 ns +Display : -1 1101 0000 00000000 00101001 at 108 ns +Stimuli : 248 -8 8 -8 248 at 114 ns +Display : 124 1100 0100 11111100 01111100 at 118 ns +Display : 41 1100 0001 11111111 00101001 at 121 ns +Display : -1 1100 0000 00000000 00101001 at 124 ns +Stimuli : 247 7 7 -9 247 at 130 ns +Display : 123 0011 0011 11111100 01111011 at 134 ns +Display : 41 0011 0001 11111111 00101001 at 137 ns +Display : 1 0011 0000 00000000 00101001 at 140 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp new file mode 100644 index 000000000..5285ae4aa --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "divide.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + divide divide1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp new file mode 100644 index 000000000..f4f3ffac7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 254; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 14; + send_value3 = 14; + send_value4 = 254; + send_value5 = 254; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(15); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1--; + send_value2 = send_value2-1; + send_value3 = send_value3-1; + send_value4 = send_value4-1; + send_value5 = send_value5-1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h new file mode 100644 index 000000000..4fe06d3f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF -- cgit v1.2.3