From 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 24 May 2018 01:37:55 -0700 Subject: systemc: Import tests from the Accellera systemc distribution. Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini Maintainer: Gabe Black --- .../general/bitwise/and/datatypes/display.h | 97 ++++++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.h (limited to 'src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.h') diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.h new file mode 100644 index 000000000..3bc92072f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.h @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector8& in_value1; // Output port + const sc_signal_bool_vector8& in_value2; // Output port + const sc_signal& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_value7; // Output port + const sc_signal_bool_vector4& in_value8; // Output port + const sc_signal_logic_vector4& in_value9; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector8& IN_VALUE1, + const sc_signal_bool_vector8& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal_bool_vector4& IN_VALUE8, + const sc_signal_logic_vector4& IN_VALUE9, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_value8 (IN_VALUE8), + in_value9 (IN_VALUE9), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF + -- cgit v1.2.3