From 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 24 May 2018 01:37:55 -0700 Subject: systemc: Import tests from the Accellera systemc distribution. Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini Maintainer: Gabe Black --- .../general/control/case/balancing/balancing.cpp | 171 ++++++++++++++++++ .../general/control/case/balancing/balancing.f | 4 + .../general/control/case/balancing/balancing.h | 102 +++++++++++ .../general/control/case/balancing/common.h | 45 +++++ .../general/control/case/balancing/display.cpp | 70 +++++++ .../general/control/case/balancing/display.h | 78 ++++++++ .../control/case/balancing/golden/balancing.log | 163 +++++++++++++++++ .../general/control/case/balancing/main.cpp | 95 ++++++++++ .../general/control/case/balancing/stimulus.cpp | 68 +++++++ .../general/control/case/balancing/stimulus.h | 75 ++++++++ .../general/control/case/datatypes/common.h | 45 +++++ .../general/control/case/datatypes/datatypes.cpp | 114 ++++++++++++ .../general/control/case/datatypes/datatypes.f | 4 + .../general/control/case/datatypes/datatypes.h | 102 +++++++++++ .../general/control/case/datatypes/display.cpp | 60 ++++++ .../general/control/case/datatypes/display.h | 75 ++++++++ .../control/case/datatypes/golden/datatypes.log | 35 ++++ .../general/control/case/datatypes/main.cpp | 95 ++++++++++ .../general/control/case/datatypes/stimulus.cpp | 71 ++++++++ .../general/control/case/datatypes/stimulus.h | 78 ++++++++ .../cae_test/general/control/case/fsm/common.h | 45 +++++ .../cae_test/general/control/case/fsm/display.cpp | 70 +++++++ .../cae_test/general/control/case/fsm/display.h | 78 ++++++++ .../misc/cae_test/general/control/case/fsm/fsm.cpp | 168 +++++++++++++++++ .../misc/cae_test/general/control/case/fsm/fsm.f | 4 + .../misc/cae_test/general/control/case/fsm/fsm.h | 102 +++++++++++ .../general/control/case/fsm/golden/fsm.log | 142 +++++++++++++++ .../cae_test/general/control/case/fsm/main.cpp | 95 ++++++++++ .../cae_test/general/control/case/fsm/stimulus.cpp | 68 +++++++ .../cae_test/general/control/case/fsm/stimulus.h | 75 ++++++++ .../general/control/case/inlining/common.h | 45 +++++ .../general/control/case/inlining/display.cpp | 58 ++++++ .../general/control/case/inlining/display.h | 69 +++++++ .../control/case/inlining/golden/inlining.log | 35 ++++ .../general/control/case/inlining/inlining.cpp | 112 ++++++++++++ .../general/control/case/inlining/inlining.f | 4 + .../general/control/case/inlining/inlining.h | 93 ++++++++++ .../general/control/case/inlining/main.cpp | 92 ++++++++++ .../general/control/case/inlining/stimulus.cpp | 71 ++++++++ .../general/control/case/inlining/stimulus.h | 78 ++++++++ .../control/if_test/balancing/balancing.cpp | 135 ++++++++++++++ .../general/control/if_test/balancing/balancing.f | 4 + .../general/control/if_test/balancing/balancing.h | 102 +++++++++++ .../general/control/if_test/balancing/common.h | 45 +++++ .../general/control/if_test/balancing/display.cpp | 70 +++++++ .../general/control/if_test/balancing/display.h | 78 ++++++++ .../control/if_test/balancing/golden/balancing.log | 134 ++++++++++++++ .../general/control/if_test/balancing/main.cpp | 95 ++++++++++ .../general/control/if_test/balancing/stimulus.cpp | 68 +++++++ .../general/control/if_test/balancing/stimulus.h | 75 ++++++++ .../general/control/if_test/conditions/common.h | 45 +++++ .../control/if_test/conditions/conditions.cpp | 129 +++++++++++++ .../control/if_test/conditions/conditions.f | 4 + .../control/if_test/conditions/conditions.h | 108 +++++++++++ .../general/control/if_test/conditions/display.cpp | 61 +++++++ .../general/control/if_test/conditions/display.h | 78 ++++++++ .../if_test/conditions/golden/conditions.log | 35 ++++ .../general/control/if_test/conditions/main.cpp | 106 +++++++++++ .../control/if_test/conditions/stimulus.cpp | 73 ++++++++ .../general/control/if_test/conditions/stimulus.h | 81 +++++++++ .../general/control/if_test/datatypes/common.h | 45 +++++ .../control/if_test/datatypes/datatypes.cpp | 119 ++++++++++++ .../general/control/if_test/datatypes/datatypes.f | 4 + .../general/control/if_test/datatypes/datatypes.h | 102 +++++++++++ .../general/control/if_test/datatypes/display.cpp | 60 ++++++ .../general/control/if_test/datatypes/display.h | 75 ++++++++ .../control/if_test/datatypes/golden/datatypes.log | 35 ++++ .../general/control/if_test/datatypes/main.cpp | 95 ++++++++++ .../general/control/if_test/datatypes/stimulus.cpp | 71 ++++++++ .../general/control/if_test/datatypes/stimulus.h | 78 ++++++++ .../cae_test/general/control/if_test/fsm/common.h | 45 +++++ .../general/control/if_test/fsm/display.cpp | 70 +++++++ .../cae_test/general/control/if_test/fsm/display.h | 78 ++++++++ .../cae_test/general/control/if_test/fsm/fsm.cpp | 138 ++++++++++++++ .../cae_test/general/control/if_test/fsm/fsm.f | 4 + .../cae_test/general/control/if_test/fsm/fsm.h | 102 +++++++++++ .../general/control/if_test/fsm/golden/fsm.log | 130 +++++++++++++ .../cae_test/general/control/if_test/fsm/main.cpp | 95 ++++++++++ .../general/control/if_test/fsm/stimulus.cpp | 68 +++++++ .../general/control/if_test/fsm/stimulus.h | 75 ++++++++ .../general/control/if_test/if_test/common.h | 45 +++++ .../general/control/if_test/if_test/display.cpp | 61 +++++++ .../general/control/if_test/if_test/display.h | 78 ++++++++ .../control/if_test/if_test/golden/if_test.log | 35 ++++ .../general/control/if_test/if_test/if_test.cpp | 118 ++++++++++++ .../general/control/if_test/if_test/if_test.f | 4 + .../general/control/if_test/if_test/if_test.h | 108 +++++++++++ .../general/control/if_test/if_test/main.cpp | 101 +++++++++++ .../general/control/if_test/if_test/stimulus.cpp | 73 ++++++++ .../general/control/if_test/if_test/stimulus.h | 81 +++++++++ .../general/control/if_test/inlining/common.h | 45 +++++ .../general/control/if_test/inlining/display.cpp | 58 ++++++ .../general/control/if_test/inlining/display.h | 69 +++++++ .../control/if_test/inlining/golden/inlining.log | 67 +++++++ .../general/control/if_test/inlining/inlining.cpp | 96 ++++++++++ .../general/control/if_test/inlining/inlining.f | 4 + .../general/control/if_test/inlining/inlining.h | 93 ++++++++++ .../general/control/if_test/inlining/main.cpp | 92 ++++++++++ .../general/control/if_test/inlining/stimulus.cpp | 71 ++++++++ .../general/control/if_test/inlining/stimulus.h | 78 ++++++++ .../general/control/loop/for_datatypes/display.cpp | 54 ++++++ .../general/control/loop/for_datatypes/display.h | 66 +++++++ .../control/loop/for_datatypes/for_datatypes.cpp | 99 ++++++++++ .../control/loop/for_datatypes/for_datatypes.f | 4 + .../control/loop/for_datatypes/for_datatypes.h | 74 ++++++++ .../loop/for_datatypes/golden/for_datatypes.log | 201 +++++++++++++++++++++ .../general/control/loop/for_datatypes/main.cpp | 82 +++++++++ .../control/loop/for_datatypes/stimulus.cpp | 83 +++++++++ .../general/control/loop/for_datatypes/stimulus.h | 69 +++++++ .../general/control/loop/for_exit/display.cpp | 52 ++++++ .../general/control/loop/for_exit/display.h | 66 +++++++ .../general/control/loop/for_exit/for_exit.cpp | 102 +++++++++++ .../general/control/loop/for_exit/for_exit.f | 4 + .../general/control/loop/for_exit/for_exit.h | 74 ++++++++ .../control/loop/for_exit/golden/for_exit.log | 123 +++++++++++++ .../general/control/loop/for_exit/main.cpp | 81 +++++++++ .../general/control/loop/for_exit/stimulus.cpp | 75 ++++++++ .../general/control/loop/for_exit/stimulus.h | 68 +++++++ .../general/control/loop/for_fsm/display.cpp | 52 ++++++ .../general/control/loop/for_fsm/display.h | 66 +++++++ .../general/control/loop/for_fsm/for_fsm.cpp | 113 ++++++++++++ .../general/control/loop/for_fsm/for_fsm.f | 4 + .../general/control/loop/for_fsm/for_fsm.h | 74 ++++++++ .../control/loop/for_fsm/golden/for_fsm.log | 180 ++++++++++++++++++ .../cae_test/general/control/loop/for_fsm/main.cpp | 81 +++++++++ .../general/control/loop/for_fsm/stimulus.cpp | 83 +++++++++ .../general/control/loop/for_fsm/stimulus.h | 68 +++++++ .../control/loop/while_datatypes/display.cpp | 54 ++++++ .../general/control/loop/while_datatypes/display.h | 66 +++++++ .../while_datatypes/golden/while_datatypes.log | 186 +++++++++++++++++++ .../general/control/loop/while_datatypes/main.cpp | 82 +++++++++ .../control/loop/while_datatypes/stimulus.cpp | 83 +++++++++ .../control/loop/while_datatypes/stimulus.h | 69 +++++++ .../loop/while_datatypes/while_datatypes.cpp | 120 ++++++++++++ .../control/loop/while_datatypes/while_datatypes.f | 4 + .../control/loop/while_datatypes/while_datatypes.h | 74 ++++++++ .../general/control/loop/while_exit/display.cpp | 54 ++++++ .../general/control/loop/while_exit/display.h | 66 +++++++ .../control/loop/while_exit/golden/while_exit.log | 183 +++++++++++++++++++ .../general/control/loop/while_exit/main.cpp | 82 +++++++++ .../general/control/loop/while_exit/stimulus.cpp | 83 +++++++++ .../general/control/loop/while_exit/stimulus.h | 69 +++++++ .../general/control/loop/while_exit/while_exit.cpp | 124 +++++++++++++ .../general/control/loop/while_exit/while_exit.f | 4 + .../general/control/loop/while_exit/while_exit.h | 74 ++++++++ .../general/control/loop/while_fsm/display.cpp | 54 ++++++ .../general/control/loop/while_fsm/display.h | 66 +++++++ .../control/loop/while_fsm/golden/while_fsm.log | 183 +++++++++++++++++++ .../general/control/loop/while_fsm/main.cpp | 82 +++++++++ .../general/control/loop/while_fsm/stimulus.cpp | 82 +++++++++ .../general/control/loop/while_fsm/stimulus.h | 69 +++++++ .../general/control/loop/while_fsm/while_fsm.cpp | 120 ++++++++++++ .../general/control/loop/while_fsm/while_fsm.f | 4 + .../general/control/loop/while_fsm/while_fsm.h | 74 ++++++++ 154 files changed, 11755 insertions(+) create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.f 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src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/golden/while_datatypes.log create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/main.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.f create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/golden/while_exit.log create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/main.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.f create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f create mode 100644 src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h (limited to 'src/systemc/tests/systemc/misc/cae_test/general/control') diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.cpp new file mode 100644 index 000000000..b25ae0fa6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.cpp @@ -0,0 +1,171 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-25 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" + + +void balancing::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + unsigned int tmpint; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + out_tmp2 = 0; + out_tmp3 = 0; + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + + //easy, just a bunch of different waits + out_valid1.write(true); + tmpint = tmp1.to_uint(); + switch (tmpint) { + case 4 : + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + case 3 : + out_value1.write(2); + wait(); + wait(); + wait(); + case 2 : + out_value1.write(1); + wait(); + wait(); + default : + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + tmp1 = tmp2; + out_valid2.write(true); + wait(); + tmpint = tmp1.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + case 4 : + case 5 : + case 6 : + case 7 : + //short operation should not extent latency + out_tmp2 = 4; + wait(); + case 8 | 9 | 10 | 11: + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp3 = in_value3.read(); + out_valid3.write(true); + wait(); + tmpint = tmp3.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + case 4 : + case 5 : + case 6 : + case 7 : + //short operation should not extent latency + out_tmp2 = 4; + case 8 : + case 9 : + case 10 : + case 11 : + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + }; + wait(); + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.f new file mode 100644 index 000000000..0a6488983 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.f @@ -0,0 +1,4 @@ +balancing/balancing.cpp +balancing/display.cpp +balancing/main.cpp +balancing/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.h new file mode 100644 index 000000000..a27e68018 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( balancing ) +{ + SC_HAS_PROCESS( balancing ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + balancing( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.cpp new file mode 100644 index 000000000..55ff8cb26 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.h new file mode 100644 index 000000000..f42a6b294 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/golden/balancing.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/golden/balancing.log new file mode 100644 index 000000000..264e09ae0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/golden/balancing.log @@ -0,0 +1,163 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data2 0000 at 6 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data2 0000 at 9 ns +Display : in_data2 0000 at 10 ns +Display : in_data2 0000 at 11 ns +Display : in_data2 0000 at 12 ns +Display : in_data3 0000 at 14 ns +Display : in_data3 0000 at 15 ns +Display : in_data3 0000 at 16 ns +Display : in_data3 0000 at 17 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data3 0000 at 18 ns +Display : in_data3 0000 at 19 ns +Display : in_data3 0000 at 20 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data1 0010 at 38 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data2 0001 at 42 ns +Display : in_data2 0001 at 43 ns +Display : in_data2 0001 at 44 ns +Display : in_data2 0001 at 45 ns +Display : in_data2 0001 at 46 ns +Display : in_data3 0000 at 48 ns +Display : in_data3 0000 at 49 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data3 0000 at 50 ns +Display : in_data3 0000 at 51 ns +Display : in_data3 0000 at 52 ns +Display : in_data3 0000 at 53 ns +Display : in_data3 0000 at 54 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0011 at 72 ns +Display : in_data1 0010 at 73 ns +Display : in_data1 0010 at 74 ns +Display : in_data1 0010 at 75 ns +Display : in_data1 0001 at 76 ns +Display : in_data1 0001 at 77 ns +Display : in_data1 0100 at 78 ns +Display : in_data2 0001 at 80 ns +Display : in_data2 0001 at 81 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data2 0001 at 82 ns +Display : in_data2 0001 at 83 ns +Display : in_data2 0001 at 84 ns +Display : in_data2 0001 at 85 ns +Display : in_data3 0000 at 87 ns +Display : in_data3 0000 at 88 ns +Display : in_data3 0000 at 89 ns +Display : in_data3 0000 at 90 ns +Display : in_data3 0000 at 91 ns +Display : in_data3 0000 at 92 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0110 at 100 ns +Display : in_data2 0001 at 102 ns +Display : in_data2 0001 at 103 ns +Display : in_data2 0001 at 104 ns +Display : in_data2 0001 at 105 ns +Display : in_data2 0001 at 106 ns +Display : in_data2 0001 at 107 ns +Display : in_data3 0000 at 109 ns +Display : in_data3 0000 at 110 ns +Display : in_data3 0000 at 111 ns +Display : in_data3 0000 at 112 ns +Display : in_data3 0000 at 113 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data3 0000 at 114 ns +Display : in_data1 0111 at 116 ns +Display : in_data2 0001 at 118 ns +Display : in_data2 0001 at 119 ns +Display : in_data2 0001 at 120 ns +Display : in_data2 0001 at 121 ns +Display : in_data2 0001 at 122 ns +Display : in_data2 0001 at 123 ns +Display : in_data3 0000 at 125 ns +Display : in_data3 0000 at 126 ns +Display : in_data3 0000 at 127 ns +Display : in_data3 0000 at 128 ns +Display : in_data3 0000 at 129 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data3 0000 at 130 ns +Display : in_data1 1000 at 132 ns +Display : in_data2 0001 at 134 ns +Display : in_data2 0001 at 135 ns +Display : in_data3 0000 at 137 ns +Display : in_data3 0000 at 138 ns +Display : in_data3 0000 at 139 ns +Display : in_data3 0000 at 140 ns +Display : in_data3 0000 at 141 ns +Display : in_data3 0000 at 142 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1001 at 148 ns +Display : in_data2 0001 at 150 ns +Display : in_data2 0001 at 151 ns +Display : in_data3 0000 at 153 ns +Display : in_data3 0000 at 154 ns +Display : in_data3 0000 at 155 ns +Display : in_data3 0000 at 156 ns +Display : in_data3 0000 at 157 ns +Display : in_data3 0000 at 158 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1010 at 164 ns +Display : in_data2 0001 at 166 ns +Display : in_data2 0001 at 167 ns +Display : in_data3 0000 at 169 ns +Display : in_data3 0000 at 170 ns +Display : in_data3 0000 at 171 ns +Display : in_data3 0000 at 172 ns +Display : in_data3 0000 at 173 ns +Display : in_data3 0000 at 174 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1011 at 180 ns +Display : in_data2 0001 at 182 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data3 0000 at 188 ns +Display : in_data3 0000 at 189 ns +Display : in_data3 0000 at 190 ns +Display : in_data3 0000 at 191 ns +Display : in_data3 0000 at 192 ns +Display : in_data3 0000 at 193 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1100 at 196 ns +Display : in_data2 0001 at 198 ns +Display : in_data2 0001 at 199 ns +Display : in_data3 0000 at 201 ns +Display : in_data3 0000 at 202 ns +Display : in_data3 0000 at 203 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1101 at 212 ns +Display : in_data2 0001 at 214 ns +Display : in_data2 0001 at 215 ns +Display : in_data3 0000 at 217 ns +Display : in_data3 0000 at 218 ns +Display : in_data3 0000 at 219 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1110 at 228 ns +Display : in_data2 0001 at 230 ns +Display : in_data2 0001 at 231 ns +Display : in_data3 0000 at 233 ns +Display : in_data3 0000 at 234 ns +Display : in_data3 0000 at 235 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1111 at 244 ns +Display : in_data2 0001 at 246 ns +Display : in_data2 0001 at 247 ns +Display : in_data3 0000 at 249 ns +Display : in_data3 0000 at 250 ns +Display : in_data3 0000 at 251 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/main.cpp new file mode 100644 index 000000000..177cebdfb --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + balancing balancing1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.cpp new file mode 100644 index 000000000..65f97f5d6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.h new file mode 100644 index 000000000..a03d3e296 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.cpp new file mode 100644 index 000000000..2d6ece6cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + + +void datatypes::entry() { + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + // reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //checking if condition on a range of bits + if (tmp1.range(1,3) == 4) { + out_value1.write(3); + } else if (tmp1.range(3,1) == 4) { + out_value1.write(2); + } else { + out_value1.write(tmp1); + }; + wait(); + + if (tmp2[2]) { + out_value2.write(3); + } else if ((bool)tmp1[1]==true) { + out_value2.write(2); + } else { + out_value2.write(tmp2); + }; + wait(); + + if (tmp3.range(1,3)=="000" || ((tmp3.range(3,1).to_uint()!=4) && + tmp3.range(3,1).to_uint()!=5 && tmp3.range(3,1).to_uint()!=6 && + tmp3.range(3,1).to_uint()!=7)) { + out_value3.write(1); + } else { + out_value3.write(tmp3); + }; + + if (tmp4.range(1,3)=="000" || (tmp4.range(3,1).to_uint()!=4 && + tmp4.range(3,1).to_uint()!=5 && tmp4.range(3,1).to_uint()!=6 && + tmp4.range(3,1).to_uint()!=7)) { + out_value4.write(1); + } else { + out_value4.write(tmp4); + }; + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.f new file mode 100644 index 000000000..c767ce1c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/datatypes.cpp +datatypes/display.cpp +datatypes/main.cpp +datatypes/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.h new file mode 100644 index 000000000..ac098dc52 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_valid; + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.cpp new file mode 100644 index 000000000..530b46ce3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.h new file mode 100644 index 000000000..5fcc3c5b3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/golden/datatypes.log new file mode 100644 index 000000000..f183028c3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/golden/datatypes.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +Display : 0000 0000 0001 0001 at 6 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +Display : 0001 0001 0001 0001 at 17 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +Display : 0011 0010 0001 0001 at 28 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +Display : 0011 0010 0001 0001 at 39 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +Display : 0100 0011 0001 0001 at 50 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +Display : 0101 0011 0001 0001 at 61 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +Display : 0110 0011 0001 0001 at 72 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +Display : 0111 0011 0001 0001 at 83 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +Display : 0010 1000 1000 1000 at 94 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +Display : 0010 1001 1001 1001 at 105 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +Display : 1010 0010 1010 1010 at 116 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +Display : 1011 0010 1011 1011 at 127 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +Display : 1100 0011 1100 1100 at 138 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +Display : 1101 0011 1101 1101 at 149 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +Display : 1110 0011 1110 1110 at 160 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +Display : 1111 0011 1111 1111 at 171 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/main.cpp new file mode 100644 index 000000000..b7e9c4496 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal output_valid; + + + + datatypes datatypes1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + result3, + result4, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.cpp new file mode 100644 index 000000000..c3d3dea5a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.h new file mode 100644 index 000000000..058da3946 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.cpp new file mode 100644 index 000000000..f089446c8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.h new file mode 100644 index 000000000..f42a6b294 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.cpp new file mode 100644 index 000000000..90972a738 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.cpp @@ -0,0 +1,168 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" + +void fsm::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + unsigned int tmpint; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + + //easy, just a bunch of different waits + out_valid1.write(true); + tmpint = tmp1.to_uint(); + wait(); + switch (tmpint) { + case 4 : + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + break; + case 3 : + out_value1.write(2); + wait(); + wait(); + wait(); + break; + case 2 : + out_value1.write(1); + wait(); + wait(); + break; + default : + out_value1.write(tmp1); + wait(); + break; + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + tmpint = tmp2.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + break; + case 4 : + case 5 : + case 6 : + case 7 : + //short operation should not extent latency + out_tmp2 = 4; + wait(); + break; + case 8 : + case 9 : + case 10 : + case 11 : + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + break; + }; + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + // and just another short case, maybe later to check unbalanched case + tmp3 = in_value3.read(); + out_valid3.write(true); + wait(); + tmpint = tmp3.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp3 = tmp3*tmp3*tmp3; + wait(); + break; + default : + //short operation should not extent latency + out_tmp3 = 4; + wait(); + break; + }; + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.f new file mode 100644 index 000000000..c9b315fc7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.f @@ -0,0 +1,4 @@ +fsm/display.cpp +fsm/fsm.cpp +fsm/main.cpp +fsm/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.h new file mode 100644 index 000000000..ee5feb351 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( fsm ) +{ + SC_HAS_PROCESS( fsm ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + fsm( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/golden/fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/golden/fsm.log new file mode 100644 index 000000000..89ea6bcd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/golden/fsm.log @@ -0,0 +1,142 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data1 0000 at 5 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data3 0000 at 10 ns +Display : in_data3 0000 at 11 ns +Display : in_data3 0000 at 12 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0000 at 20 ns +Display : in_data1 0001 at 21 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data3 0000 at 26 ns +Display : in_data3 0000 at 27 ns +Display : in_data3 0001 at 28 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data1 0001 at 38 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data3 0001 at 43 ns +Display : in_data3 0001 at 44 ns +Display : in_data3 1000 at 45 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0001 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data1 0010 at 55 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data3 1000 at 60 ns +Display : in_data3 1000 at 61 ns +Display : in_data3 1011 at 62 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0010 at 72 ns +Display : in_data1 0011 at 73 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data3 1011 at 78 ns +Display : in_data3 1011 at 79 ns +Display : in_data3 0100 at 80 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0011 at 84 ns +Display : in_data1 0101 at 85 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data3 0100 at 90 ns +Display : in_data3 0100 at 91 ns +Display : in_data3 0100 at 92 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0101 at 100 ns +Display : in_data1 0110 at 101 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data3 0100 at 106 ns +Display : in_data3 0100 at 107 ns +Display : in_data3 0100 at 108 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0110 at 116 ns +Display : in_data1 0111 at 117 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data3 0100 at 122 ns +Display : in_data3 0100 at 123 ns +Display : in_data3 0100 at 124 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 0111 at 132 ns +Display : in_data1 1000 at 133 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data3 0100 at 140 ns +Display : in_data3 0100 at 141 ns +Display : in_data3 0100 at 142 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1000 at 148 ns +Display : in_data1 1001 at 149 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data3 0100 at 156 ns +Display : in_data3 0100 at 157 ns +Display : in_data3 0100 at 158 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1001 at 164 ns +Display : in_data1 1010 at 165 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data3 0100 at 172 ns +Display : in_data3 0100 at 173 ns +Display : in_data3 0100 at 174 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1010 at 180 ns +Display : in_data1 1011 at 181 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data3 0100 at 188 ns +Display : in_data3 0100 at 189 ns +Display : in_data3 0100 at 190 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1011 at 196 ns +Display : in_data1 1100 at 197 ns +Display : in_data2 0001 at 199 ns +Display : in_data3 0100 at 201 ns +Display : in_data3 0100 at 202 ns +Display : in_data3 0100 at 203 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1100 at 212 ns +Display : in_data1 1101 at 213 ns +Display : in_data2 0001 at 215 ns +Display : in_data3 0100 at 217 ns +Display : in_data3 0100 at 218 ns +Display : in_data3 0100 at 219 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1101 at 228 ns +Display : in_data1 1110 at 229 ns +Display : in_data2 0001 at 231 ns +Display : in_data3 0100 at 233 ns +Display : in_data3 0100 at 234 ns +Display : in_data3 0100 at 235 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1110 at 244 ns +Display : in_data1 1111 at 245 ns +Display : in_data2 0001 at 247 ns +Display : in_data3 0100 at 249 ns +Display : in_data3 0100 at 250 ns +Display : in_data3 0100 at 251 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/main.cpp new file mode 100644 index 000000000..5280ddd17 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + fsm fsm1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.cpp new file mode 100644 index 000000000..65f97f5d6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.h new file mode 100644 index 000000000..a03d3e296 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.cpp new file mode 100644 index 000000000..0135a0381 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.h new file mode 100644 index 000000000..74d4c67ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/golden/inlining.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/golden/inlining.log new file mode 100644 index 000000000..3a3a8c358 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/golden/inlining.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +Display : 0000 0000 at 6 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +Display : 0000 0001 at 17 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +Display : 0000 0010 at 28 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +Display : 0000 0011 at 39 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +Display : 0100 0100 at 50 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +Display : 0101 0101 at 61 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +Display : 0110 0110 at 72 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +Display : 0111 0111 at 83 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +Display : 1000 1000 at 94 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +Display : 1001 1001 at 105 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +Display : 1010 1010 at 116 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +Display : 1011 1011 at 127 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +Display : 1100 1100 at 138 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +Display : 1101 1101 at 149 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +Display : 1110 1110 at 160 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +Display : 1111 1111 at 171 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.cpp new file mode 100644 index 000000000..08da0e3ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" + +// list of defines +#define clock(a) wait(a) +#define intu4(a) sc_biguint<4> a; +#define vec4(a) sc_lv<4> a; +#define my_case(a, b, c) switch (a) { \ + case 0: \ + case 1: \ + case 2: \ + case 3: \ + b = 0; \ + break; \ + default : \ + b = c; \ + break; \ + }; +#define my_wait_case(a, b, c) switch (a) { \ + case 0: \ + case 1: \ + case 2: \ + case 3: \ + b = 0; \ + wait(); \ + break; \ + default : \ + b = c; \ + wait(); \ + break; \ + }; + +void inlining::entry(){ + + int tmp1; + int tmp2; + vec4(tmp3); + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_valid.write(false); + clock(1); + } else clock(1); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read().to_int(); + tmp2 = in_value2.read().to_int(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //execution + my_wait_case(tmp1, tmp3, tmp4); + out_value1.write(tmp3); + clock(1); + + my_case(tmp2, tmp3, tmp4); + out_value2.write(tmp4); + out_valid.write(true); + clock(1); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.f new file mode 100644 index 000000000..fc00870e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.f @@ -0,0 +1,4 @@ +inlining/display.cpp +inlining/inlining.cpp +inlining/main.cpp +inlining/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.h new file mode 100644 index 000000000..70380e24e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.h @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( inlining ) +{ + SC_HAS_PROCESS( inlining ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1 ; + const sc_signal_bool_vector& in_value2 ; + const sc_signal_bool_vector& in_value3 ; + const sc_signal_bool_vector& in_value4 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal& out_valid; + + // + // Constructor + // + + inlining( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + // + void entry (); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/main.cpp new file mode 100644 index 000000000..c859cafce --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/main.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal output_valid; + + + + inlining inlining1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid + ); + + display display1 ("display", + clock, + result1, + result2, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.cpp new file mode 100644 index 000000000..c3d3dea5a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.h new file mode 100644 index 000000000..058da3946 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp new file mode 100644 index 000000000..13ee2a807 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" + +void balancing::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + + //easy, just a bunch of different waits + out_valid1.write(true); + if (tmp1 == 4) { + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + } else if (tmp1 == 3) { + out_value1.write(2); + wait(); + wait(); + wait(); + } else if (tmp1 == 2) { + out_value1.write(1); + wait(); + wait(); + } else { + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + if (tmp2<4) { + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + } else if (tmp2<8) { + //short operation should not extent latency + out_tmp2 = 4; + wait(); + } else if (tmp2<12) { + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + //if branch without else + tmp3 = in_value3.read(); + out_valid3.write(true); + wait(); + if (tmp3<8) { + out_tmp3 = 4; + wait(); + } + + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f new file mode 100644 index 000000000..2d727063d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f @@ -0,0 +1,4 @@ +balancing/main.cpp +balancing/stimulus.cpp +balancing/display.cpp +balancing/balancing.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h new file mode 100644 index 000000000..d32742dc6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( balancing ) +{ + SC_HAS_PROCESS( balancing ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + balancing( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp new file mode 100644 index 000000000..f61b61003 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h new file mode 100644 index 000000000..5860d2d9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log new file mode 100644 index 000000000..b3ca99775 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log @@ -0,0 +1,134 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data2 0000 at 6 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data3 0000 at 10 ns +Display : in_data3 0000 at 11 ns +Display : in_data3 0100 at 12 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0001 at 20 ns +Display : in_data2 0000 at 22 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data3 0100 at 26 ns +Display : in_data3 0100 at 27 ns +Display : in_data3 0100 at 28 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data2 0001 at 39 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data3 0100 at 43 ns +Display : in_data3 0100 at 44 ns +Display : in_data3 0100 at 45 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0010 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data2 1000 at 56 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data3 0100 at 60 ns +Display : in_data3 0100 at 61 ns +Display : in_data3 0100 at 62 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0011 at 72 ns +Display : in_data2 1011 at 74 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data3 0100 at 78 ns +Display : in_data3 0100 at 79 ns +Display : in_data3 0100 at 80 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0101 at 84 ns +Display : in_data2 0100 at 86 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data3 0100 at 90 ns +Display : in_data3 0100 at 91 ns +Display : in_data3 0100 at 92 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0110 at 100 ns +Display : in_data2 0100 at 102 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data3 0100 at 106 ns +Display : in_data3 0100 at 107 ns +Display : in_data3 0100 at 108 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0111 at 116 ns +Display : in_data2 0100 at 118 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data3 0100 at 122 ns +Display : in_data3 0100 at 123 ns +Display : in_data3 0100 at 124 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 1000 at 132 ns +Display : in_data2 0100 at 134 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data3 0100 at 140 ns +Display : in_data3 0100 at 141 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1001 at 148 ns +Display : in_data2 0001 at 150 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data3 0100 at 156 ns +Display : in_data3 0100 at 157 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1010 at 164 ns +Display : in_data2 0001 at 166 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data3 0100 at 172 ns +Display : in_data3 0100 at 173 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1011 at 180 ns +Display : in_data2 0001 at 182 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data3 0100 at 188 ns +Display : in_data3 0100 at 189 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1100 at 196 ns +Display : in_data2 0001 at 198 ns +Display : in_data2 0001 at 199 ns +Display : in_data3 0100 at 201 ns +Display : in_data3 0100 at 202 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1101 at 212 ns +Display : in_data2 0001 at 214 ns +Display : in_data2 0001 at 215 ns +Display : in_data3 0100 at 217 ns +Display : in_data3 0100 at 218 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1110 at 228 ns +Display : in_data2 0001 at 230 ns +Display : in_data2 0001 at 231 ns +Display : in_data3 0100 at 233 ns +Display : in_data3 0100 at 234 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1111 at 244 ns +Display : in_data2 0001 at 246 ns +Display : in_data2 0001 at 247 ns +Display : in_data3 0100 at 249 ns +Display : in_data3 0100 at 250 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp new file mode 100644 index 000000000..01e223141 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + balancing balancing1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp new file mode 100644 index 000000000..53a319114 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h new file mode 100644 index 000000000..1bc242809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp new file mode 100644 index 000000000..5ecc74334 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + conditions.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "conditions.h" + +void conditions::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp2a; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + int tmp5; + bool cond_tmp; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_value5.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + // complex condition on variables + if ((tmp1==4) && (tmp2<6) || (tmp5+tmp4.to_int()==6)) { + out_value1.write(4); + } else { + out_value1.write(tmp1); + }; + wait(); + + // complex conditions on signal reads + if ((in_value1.read().to_uint()==4) && (in_value2.read().to_int()<6) || + (in_value4.read().to_int()+in_value5.read()==6)) { + out_value2.write(4); + } else { + out_value2.write(tmp1); + }; + wait(); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + // complex conditions outside the if; does it matter for timing? + cond_tmp = (tmp1==4) && (tmp2<6) || (tmp5+tmp4.to_int()==6); + if (cond_tmp) { + out_value3.write(4); + } else { + out_value3.write(tmp1); + }; + wait(); + + // arithmetic if can only be done when using the same datatypes + // therefor the temporary assignment + tmp2a = 0; + out_value4.write((tmp3.to_int()==4) && (tmp1<6) || + (tmp5+tmp2.to_int()==6)?tmp2a:tmp1); + wait(); + + // arithmetic if can only be done when using the same datatypes + // therefor the temporary assignment + tmp5 = tmp2.to_int(); + out_value5.write((in_value3.read().to_int()==4) && + (in_value1.read().to_int()<6) || + (in_value5.read()+in_value2.read().to_int()==6)? + 0:tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f new file mode 100644 index 000000000..ed7a236e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f @@ -0,0 +1,4 @@ +conditions/display.cpp +conditions/stimulus.cpp +conditions/main.cpp +conditions/conditions.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h new file mode 100644 index 000000000..f2ceadb83 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + conditions.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( conditions ) +{ + SC_HAS_PROCESS( conditions ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_value5 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_value5; + sc_signal& out_valid; + + // + // Constructor + // + + conditions( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp new file mode 100644 index 000000000..fc643330d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h new file mode 100644 index 000000000..36001ab41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log new file mode 100644 index 000000000..3432fae28 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 stim5= 0 2 ns +Display : 0000 0000 0000 0000 0 at 8 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 stim5= 1 13 ns +Display : 0001 0001 0001 0001 1 at 19 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 stim5= 2 24 ns +Display : 0010 0010 0010 0010 2 at 30 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 stim5= 3 35 ns +Display : 0100 0100 0100 0000 0 at 41 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 stim5= 4 46 ns +Display : 0100 0100 0100 0000 0 at 52 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 stim5= 5 57 ns +Display : 0101 0101 0101 0101 5 at 63 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 stim5= 6 68 ns +Display : 0110 0110 0110 0110 6 at 74 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 stim5= 7 79 ns +Display : 0111 0111 0111 0111 7 at 85 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 stim5= 8 90 ns +Display : 1000 1000 1000 1000 -8 at 96 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 stim5= 9 101 ns +Display : 1001 1001 1001 1001 -7 at 107 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 stim5= 10 112 ns +Display : 1010 1010 1010 1010 -6 at 118 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 stim5= 11 123 ns +Display : 0100 0100 0100 0000 0 at 129 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 stim5= 12 134 ns +Display : 1100 1100 1100 1100 -4 at 140 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 stim5= 13 145 ns +Display : 1101 1101 1101 1101 -3 at 151 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 stim5= 14 156 ns +Display : 1110 1110 1110 1110 -2 at 162 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 stim5= 15 167 ns +Display : 1111 1111 1111 1111 -1 at 173 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp new file mode 100644 index 000000000..bbb3a183b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp @@ -0,0 +1,106 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "conditions.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal stim5; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal result5; + sc_signal output_valid; + + + + conditions conditions1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid + ); + + display display1 ( + "display", + clock, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp new file mode 100644 index 000000000..f45313792 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + stim5.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + stim5.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " stim5= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h new file mode 100644 index 000000000..813c53e1b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& stim5; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& STIM5, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + stim5(STIM5), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp new file mode 100644 index 000000000..145f7181d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() { + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + // reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + // checking if condition on a range of bits + if (tmp1.range(1,3) == 4) { + out_value1.write(3); + } else if (tmp1.range(3,1) == 4) { + out_value1.write(2); + } else { + out_value1.write(tmp1); + }; + wait(); + + // checking if condition on bit part + if (tmp2[2]) { + out_value2.write(3); + } else if ((bool)tmp1[1]==true) { + out_value2.write(2); + } else { + out_value2.write(tmp2); + }; + wait(); + + // checking if condition on a range of bits in complex condition + if (tmp3.range(1,3)=="000" || ((tmp3.range(3,1).to_uint()!=4) && + tmp3.range(3,1).to_uint()!=5 && tmp3.range(3,1).to_uint()!=6 && + tmp3.range(3,1).to_uint()!=7)) { + out_value3.write(1); + } else { + out_value3.write(tmp3); + }; + + // checking if condition on a range of bits in complex condition + // on signal reads inside condition + if (in_value4.read().range(1,3)=="000" || + (in_value4.read().range(3,1).to_uint()!=4 && + in_value4.read().range(3,1).to_uint()!=5 && + in_value4.read().range(3,1).to_uint()!=6 && + in_value4.read().range(3,1).to_uint()!=7)) { + out_value4.write(1); + } else { + out_value4.write(tmp4); + }; + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f new file mode 100644 index 000000000..be086769d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/display.cpp +datatypes/main.cpp +datatypes/stimulus.cpp +datatypes/datatypes.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h new file mode 100644 index 000000000..43be41785 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_valid; + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp new file mode 100644 index 000000000..ceaa882b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h new file mode 100644 index 000000000..3ff6b921c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log new file mode 100644 index 000000000..f183028c3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +Display : 0000 0000 0001 0001 at 6 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +Display : 0001 0001 0001 0001 at 17 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +Display : 0011 0010 0001 0001 at 28 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +Display : 0011 0010 0001 0001 at 39 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +Display : 0100 0011 0001 0001 at 50 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +Display : 0101 0011 0001 0001 at 61 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +Display : 0110 0011 0001 0001 at 72 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +Display : 0111 0011 0001 0001 at 83 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +Display : 0010 1000 1000 1000 at 94 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +Display : 0010 1001 1001 1001 at 105 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +Display : 1010 0010 1010 1010 at 116 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +Display : 1011 0010 1011 1011 at 127 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +Display : 1100 0011 1100 1100 at 138 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +Display : 1101 0011 1101 1101 at 149 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +Display : 1110 0011 1110 1110 at 160 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +Display : 1111 0011 1111 1111 at 171 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp new file mode 100644 index 000000000..0eee3db1c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal output_valid; + + + + datatypes datatypes1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + result3, + result4, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp new file mode 100644 index 000000000..2e897dacc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h new file mode 100644 index 000000000..a82afff4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp new file mode 100644 index 000000000..f61b61003 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h new file mode 100644 index 000000000..5860d2d9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp new file mode 100644 index 000000000..6735f4d22 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp @@ -0,0 +1,138 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-25 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" + +void fsm::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + out_tmp3 = 0; + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + //easy, just a bunch of different waits + out_valid1.write(true); + wait(); + if (tmp1 == 4) { + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + } else if (tmp1 == 3) { + out_value1.write(2); + wait(); + wait(); + wait(); + } else if (tmp1 == 2) { + out_value1.write(1); + wait(); + wait(); + } else { + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + if (tmp2<4) { + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + } else if (tmp2<8) { + //short operation should not extent latency + out_tmp2 = 4; + wait(); + } else if (tmp2<12) { + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + } else { + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + // if branch without else maybe check later + tmp3 = in_value3.read(); + out_valid3.write(true); +// wait(); +// if (tmp3<8) { +// out_tmp3 = 4; +// wait(); +// } + + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f new file mode 100644 index 000000000..67fa931e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f @@ -0,0 +1,4 @@ +fsm/main.cpp +fsm/stimulus.cpp +fsm/display.cpp +fsm/fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h new file mode 100644 index 000000000..9f67e156c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( fsm ) +{ + SC_HAS_PROCESS( fsm ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + fsm( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log new file mode 100644 index 000000000..03ef8acfe --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log @@ -0,0 +1,130 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data1 0000 at 5 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data2 0000 at 9 ns +Display : in_data3 0000 at 11 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0000 at 20 ns +Display : in_data1 0001 at 21 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data2 0000 at 25 ns +Display : in_data3 0000 at 27 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data1 0001 at 38 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data2 0001 at 42 ns +Display : in_data3 0000 at 44 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0001 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data1 0010 at 55 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data2 1000 at 59 ns +Display : in_data3 0000 at 61 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0010 at 72 ns +Display : in_data1 0011 at 73 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data2 1011 at 77 ns +Display : in_data3 0000 at 79 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0011 at 84 ns +Display : in_data1 0101 at 85 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data2 0100 at 89 ns +Display : in_data3 0000 at 91 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0101 at 100 ns +Display : in_data1 0110 at 101 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data2 0100 at 105 ns +Display : in_data3 0000 at 107 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0110 at 116 ns +Display : in_data1 0111 at 117 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data2 0100 at 121 ns +Display : in_data3 0000 at 123 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 0111 at 132 ns +Display : in_data1 1000 at 133 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data2 0100 at 139 ns +Display : in_data3 0000 at 141 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1000 at 148 ns +Display : in_data1 1001 at 149 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data2 0001 at 155 ns +Display : in_data3 0000 at 157 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1001 at 164 ns +Display : in_data1 1010 at 165 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data2 0001 at 171 ns +Display : in_data3 0000 at 173 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1010 at 180 ns +Display : in_data1 1011 at 181 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data2 0001 at 187 ns +Display : in_data3 0000 at 189 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1011 at 196 ns +Display : in_data1 1100 at 197 ns +Display : in_data2 0001 at 199 ns +Display : in_data2 0001 at 200 ns +Display : in_data2 0001 at 201 ns +Display : in_data3 0000 at 203 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1100 at 212 ns +Display : in_data1 1101 at 213 ns +Display : in_data2 0001 at 215 ns +Display : in_data2 0001 at 216 ns +Display : in_data2 0001 at 217 ns +Display : in_data3 0000 at 219 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1101 at 228 ns +Display : in_data1 1110 at 229 ns +Display : in_data2 0001 at 231 ns +Display : in_data2 0001 at 232 ns +Display : in_data2 0001 at 233 ns +Display : in_data3 0000 at 235 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1110 at 244 ns +Display : in_data1 1111 at 245 ns +Display : in_data2 0001 at 247 ns +Display : in_data2 0001 at 248 ns +Display : in_data2 0001 at 249 ns +Display : in_data3 0000 at 251 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp new file mode 100644 index 000000000..68aa873e9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + fsm fsm1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp new file mode 100644 index 000000000..53a319114 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h new file mode 100644 index 000000000..1bc242809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp new file mode 100644 index 000000000..fc643330d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h new file mode 100644 index 000000000..36001ab41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log new file mode 100644 index 000000000..505f7d8d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 stim5= 0 2 ns +Display : 0000 0000 0001 0000 0 at 10 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 stim5= 1 13 ns +Display : 0001 0000 0001 0000 1 at 20 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 stim5= 2 24 ns +Display : 0001 0000 0010 0010 2 at 31 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 stim5= 3 35 ns +Display : 0010 0000 0011 0011 3 at 42 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 stim5= 4 46 ns +Display : 0011 0000 0100 0100 4 at 53 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 stim5= 5 57 ns +Display : 0101 0000 0101 0101 5 at 64 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 stim5= 6 68 ns +Display : 0110 0110 0110 0110 0 at 75 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 stim5= 7 79 ns +Display : 0111 0111 0111 0111 0 at 86 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 stim5= 8 90 ns +Display : 1000 0000 1000 1000 0 at 97 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 stim5= 9 101 ns +Display : 1001 0000 1001 1001 0 at 108 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 stim5= 10 112 ns +Display : 1010 0000 1010 1010 0 at 119 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 stim5= 11 123 ns +Display : 1011 0000 1011 1011 0 at 130 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 stim5= 12 134 ns +Display : 1100 0000 1100 1100 0 at 141 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 stim5= 13 145 ns +Display : 1101 0000 1101 1101 0 at 152 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 stim5= 14 156 ns +Display : 1110 0000 1110 1110 0 at 163 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 stim5= 15 167 ns +Display : 1111 0000 1111 1111 0 at 174 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp new file mode 100644 index 000000000..c728895ed --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + if_test.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "if_test.h" + +void if_test::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + int tmp5; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_value5.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execution + if (tmp1 == 4) { + out_value1.write(3); + } else if (tmp1 == 3) { + out_value1.write(2); + } else if (tmp1 == 2) { + out_value1.write(1); + } else { + out_value1.write(tmp1); + }; + wait(); + + if (tmp2 < 6 ) { + out_value2.write(0); + wait(); + } else { + out_value2.write(tmp2); + wait(); + }; + + if (tmp3 == "0000" ) { + out_value3.write(1); + wait(); + wait(); + } else { + out_value3.write(tmp3); + wait(); + }; + + if (tmp4 != "0001" ) { + out_value4.write(tmp4); + }; + wait(); + + out_value5.write((tmp5>=6)?0:tmp5); + wait(); + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f new file mode 100644 index 000000000..3d00cc5c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f @@ -0,0 +1,4 @@ +if_test/if_test.cpp +if_test/display.cpp +if_test/main.cpp +if_test/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h new file mode 100644 index 000000000..d1ab3341a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + if_test.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( if_test ) +{ + SC_HAS_PROCESS( if_test ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_value5 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_value5; + sc_signal& out_valid; + + // + // Constructor + // + + if_test( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp new file mode 100644 index 000000000..bfad98b86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "if_test.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal stim5; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal result5; + sc_signal output_valid; + + + + if_test if_test1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + result5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp new file mode 100644 index 000000000..f45313792 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + stim5.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + stim5.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " stim5= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h new file mode 100644 index 000000000..813c53e1b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& stim5; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& STIM5, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + stim5(STIM5), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp new file mode 100644 index 000000000..b0ac27b0c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h new file mode 100644 index 000000000..ea15269eb --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log new file mode 100644 index 000000000..b5ed181e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log @@ -0,0 +1,67 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +tmp1 my print 1 +tmp2 my print 0 +Display : 0001 0000 at 5 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +tmp1 my print 2 +tmp2 my print 1 +Display : 0010 0001 at 16 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +tmp1 my print 3 +tmp2 my print 2 +Display : 0011 0010 at 27 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +tmp1 my print 4 +tmp2 my print 3 +Display : 0100 0011 at 38 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +tmp1 my print 5 +tmp2 my print 4 +Display : 0101 0100 at 49 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +tmp1 my print 6 +tmp2 my print 5 +Display : 0110 0101 at 60 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +tmp1 my print 7 +tmp2 my print 6 +Display : 0111 0110 at 71 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +tmp1 my print 8 +tmp2 my print 7 +Display : 1000 0111 at 82 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +tmp1 my print 9 +tmp2 my print 8 +Display : 1001 1000 at 93 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +tmp1 my print 10 +tmp2 my print 9 +Display : 1010 1001 at 104 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +tmp1 my print 11 +tmp2 my print 10 +Display : 1011 1010 at 115 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +tmp1 my print 12 +tmp2 my print 11 +Display : 1100 1011 at 126 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +tmp1 my print 13 +tmp2 my print 12 +Display : 1101 1100 at 137 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +tmp1 my print 14 +tmp2 my print 13 +Display : 1110 1101 at 148 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +tmp1 my print 15 +tmp2 my print 14 +Display : 1111 1110 at 159 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +tmp1 my print 0 +tmp2 my print 15 +Display : 1111 1111 at 170 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp new file mode 100644 index 000000000..232c6a8e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" + +// list of defines +// #define MAXI(a,b) ((a)>(b)?(a):(b)) +#define MAXI(a,b) ( (a) > (b) ? sc_biguint<4>( a ) : sc_biguint<4>( b ) ) +#define clockedge wait() +#define my_print(a) cout << #a << " my print " << a << endl +#define my_if(a, b, c) if (a < 6 ) { \ + b = 0; \ + } else { \ + b = c; \ + }; + +void inlining::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_valid.write(false); + clockedge; + } else clockedge; + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //execution + ++tmp1; + out_value1.write(MAXI(tmp1, tmp2)); + my_print(tmp1); + my_print(tmp2); + clockedge; + + my_if(tmp2, tmp3, tmp4); + out_value2.write(tmp4); + out_valid.write(true); + clockedge; + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f new file mode 100644 index 000000000..4c51c0531 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f @@ -0,0 +1,4 @@ +inlining/main.cpp +inlining/stimulus.cpp +inlining/display.cpp +inlining/inlining.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h new file mode 100644 index 000000000..457fd7048 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( inlining ) +{ + SC_HAS_PROCESS( inlining ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1 ; + const sc_signal_bool_vector& in_value2 ; + const sc_signal_bool_vector& in_value3 ; + const sc_signal_bool_vector& in_value4 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal& out_valid; + + // + // Constructor + // + + inlining( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + // + void entry (); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp new file mode 100644 index 000000000..89a428293 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal output_valid; + + + + inlining inlining1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid + ); + + display display1 ("display", + clock, + result1, + result2, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp new file mode 100644 index 000000000..2e897dacc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h new file mode 100644 index 000000000..a82afff4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.cpp new file mode 100644 index 000000000..336edf69c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.h new file mode 100644 index 000000000..e858eb226 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.cpp new file mode 100644 index 000000000..668c4ee95 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_datatypes.h" + +#define max 10 + +void for_datatypes::entry() +{ + + int i; + sc_signed counter_signed(8); + sc_unsigned counter_unsigned(8); + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + //read inputs + while (in_valid.read()==false) wait(); + + //execution of for loop with integer counter + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + result.write(in_value.read()); + wait(); + }; + out_valid.write(false); + wait(4); + + //execution of for loop with signed counter + out_valid.write(true); + wait(); + for (counter_signed=1; counter_signed.to_int()<=max; counter_signed++) { + result.write(in_value.read()); + wait(); + }; + out_valid.write(false); + wait(4); + + //execution of for loop with unsinged counter + out_valid.write(true); + wait(); + for (counter_unsigned=1; counter_unsigned.to_uint()<=max; counter_unsigned++) { + result.write(in_value.read()); + wait(); + }; + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.f new file mode 100644 index 000000000..127102844 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.f @@ -0,0 +1,4 @@ +for_datatypes/stimulus.cpp +for_datatypes/main.cpp +for_datatypes/display.cpp +for_datatypes/for_datatypes.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.h new file mode 100644 index 000000000..dcacddfff --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( for_datatypes ) +{ + SC_HAS_PROCESS( for_datatypes ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + for_datatypes ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/golden/for_datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/golden/for_datatypes.log new file mode 100644 index 000000000..4fb0720f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/golden/for_datatypes.log @@ -0,0 +1,201 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 2 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 3 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 4 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Display : 8 at 16 ns +Display : 9 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Display : 10 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 1 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 2 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 3 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 4 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 7 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Display : 8 at 31 ns +Display : 9 at 32 ns +Display : 10 at 33 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Display : 10 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Display : 1 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Display : 2 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 3 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 7 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Display : 8 at 46 ns +Display : 9 at 47 ns +Display : 10 at 48 ns +Stimuli1 : in_valid = true in_value 0 at 57 ns +Stimuli1 : in_valid = true in_value 1 at 58 ns +Stimuli1 : in_valid = true in_value 2 at 59 ns +Display : 10 at 59 ns +Stimuli1 : in_valid = true in_value 3 at 60 ns +Display : 1 at 60 ns +Stimuli1 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli1 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli1 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli1 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli1 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli1 : in_valid = true in_value 9 at 66 ns +Display : 7 at 66 ns +Stimuli1 : in_valid = true in_value 10 at 67 ns +Display : 8 at 67 ns +Display : 9 at 68 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 0 at 72 ns +Stimuli2 : in_valid = true in_value 1 at 73 ns +Stimuli2 : in_valid = true in_value 2 at 74 ns +Display : 10 at 74 ns +Stimuli2 : in_valid = true in_value 3 at 75 ns +Display : 1 at 75 ns +Stimuli2 : in_valid = true in_value 4 at 76 ns +Display : 2 at 76 ns +Stimuli2 : in_valid = true in_value 5 at 77 ns +Display : 3 at 77 ns +Stimuli2 : in_valid = true in_value 6 at 78 ns +Display : 4 at 78 ns +Stimuli2 : in_valid = true in_value 7 at 79 ns +Display : 5 at 79 ns +Stimuli2 : in_valid = true in_value 8 at 80 ns +Display : 6 at 80 ns +Stimuli2 : in_valid = true in_value 9 at 81 ns +Display : 7 at 81 ns +Stimuli2 : in_valid = true in_value 10 at 82 ns +Display : 8 at 82 ns +Display : 9 at 83 ns +Display : 10 at 84 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Display : 10 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Display : 1 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Display : 2 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 3 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 7 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Display : 8 at 97 ns +Display : 9 at 98 ns +Display : 10 at 99 ns +Stimuli1 : in_valid = true in_value 0 at 108 ns +Stimuli1 : in_valid = true in_value 1 at 109 ns +Stimuli1 : in_valid = true in_value 2 at 110 ns +Display : 10 at 110 ns +Stimuli1 : in_valid = true in_value 3 at 111 ns +Display : 1 at 111 ns +Stimuli1 : in_valid = true in_value 4 at 112 ns +Display : 2 at 112 ns +Stimuli1 : in_valid = true in_value 5 at 113 ns +Display : 3 at 113 ns +Stimuli1 : in_valid = true in_value 6 at 114 ns +Display : 4 at 114 ns +Stimuli1 : in_valid = true in_value 7 at 115 ns +Display : 5 at 115 ns +Stimuli1 : in_valid = true in_value 8 at 116 ns +Display : 6 at 116 ns +Stimuli1 : in_valid = true in_value 9 at 117 ns +Display : 7 at 117 ns +Stimuli1 : in_valid = true in_value 10 at 118 ns +Display : 8 at 118 ns +Display : 9 at 119 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 0 at 123 ns +Stimuli2 : in_valid = true in_value 1 at 124 ns +Stimuli2 : in_valid = true in_value 2 at 125 ns +Display : 10 at 125 ns +Stimuli2 : in_valid = true in_value 3 at 126 ns +Display : 1 at 126 ns +Stimuli2 : in_valid = true in_value 4 at 127 ns +Display : 2 at 127 ns +Stimuli2 : in_valid = true in_value 5 at 128 ns +Display : 3 at 128 ns +Stimuli2 : in_valid = true in_value 6 at 129 ns +Display : 4 at 129 ns +Stimuli2 : in_valid = true in_value 7 at 130 ns +Display : 5 at 130 ns +Stimuli2 : in_valid = true in_value 8 at 131 ns +Display : 6 at 131 ns +Stimuli2 : in_valid = true in_value 9 at 132 ns +Display : 7 at 132 ns +Stimuli2 : in_valid = true in_value 10 at 133 ns +Display : 8 at 133 ns +Display : 9 at 134 ns +Display : 10 at 135 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Display : 10 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Display : 1 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Display : 2 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 3 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 7 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns +Display : 8 at 148 ns +Display : 9 at 149 ns +Display : 10 at 150 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/main.cpp new file mode 100644 index 000000000..a306ccd47 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + for_datatypes for_datatypes1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.cpp new file mode 100644 index 000000000..af5159663 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.h new file mode 100644 index 000000000..e20114c36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.cpp new file mode 100644 index 000000000..05c349065 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.h new file mode 100644 index 000000000..e858eb226 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.cpp new file mode 100644 index 000000000..db3ac2bb9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_exit.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_exit.h" + +#define max 10 + +void for_exit::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop with continues + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (inp_tmp<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + }; + }; + out_valid.write(false); + wait(5); + + // for loop with break + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + } + }; + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.f new file mode 100644 index 000000000..b1509dea5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.f @@ -0,0 +1,4 @@ +for_exit/main.cpp +for_exit/stimulus.cpp +for_exit/display.cpp +for_exit/for_exit.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.h new file mode 100644 index 000000000..8d2de9783 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_exit.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( for_exit ) +{ + SC_HAS_PROCESS( for_exit ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + for_exit( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/golden/for_exit.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/golden/for_exit.log new file mode 100644 index 000000000..a7037c4e5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/golden/for_exit.log @@ -0,0 +1,123 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 1 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 1 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 1 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Display : 7 at 16 ns +Display : 9 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 2 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 3 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 4 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 6 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Stimuli1 : in_valid = true in_value 0 at 42 ns +Stimuli1 : in_valid = true in_value 1 at 43 ns +Stimuli1 : in_valid = true in_value 2 at 44 ns +Display : 6 at 44 ns +Stimuli1 : in_valid = true in_value 3 at 45 ns +Display : 1 at 45 ns +Stimuli1 : in_valid = true in_value 4 at 46 ns +Display : 1 at 46 ns +Stimuli1 : in_valid = true in_value 5 at 47 ns +Display : 1 at 47 ns +Stimuli1 : in_valid = true in_value 6 at 48 ns +Display : 1 at 48 ns +Stimuli1 : in_valid = true in_value 7 at 49 ns +Display : 5 at 49 ns +Stimuli1 : in_valid = true in_value 8 at 50 ns +Display : 6 at 50 ns +Stimuli1 : in_valid = true in_value 9 at 51 ns +Display : 7 at 51 ns +Stimuli1 : in_valid = true in_value 10 at 52 ns +Display : 7 at 52 ns +Display : 9 at 53 ns +Display : 10 at 54 ns +Stimuli2 : in_valid = true in_value 0 at 57 ns +Stimuli2 : in_valid = true in_value 1 at 58 ns +Stimuli2 : in_valid = true in_value 2 at 59 ns +Stimuli2 : in_valid = true in_value 3 at 60 ns +Display : 10 at 60 ns +Stimuli2 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli2 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli2 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli2 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli2 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli2 : in_valid = true in_value 9 at 66 ns +Display : 6 at 66 ns +Stimuli2 : in_valid = true in_value 10 at 67 ns +Stimuli1 : in_valid = true in_value 0 at 78 ns +Stimuli1 : in_valid = true in_value 1 at 79 ns +Stimuli1 : in_valid = true in_value 2 at 80 ns +Display : 6 at 80 ns +Stimuli1 : in_valid = true in_value 3 at 81 ns +Display : 1 at 81 ns +Stimuli1 : in_valid = true in_value 4 at 82 ns +Display : 1 at 82 ns +Stimuli1 : in_valid = true in_value 5 at 83 ns +Display : 1 at 83 ns +Stimuli1 : in_valid = true in_value 6 at 84 ns +Display : 1 at 84 ns +Stimuli1 : in_valid = true in_value 7 at 85 ns +Display : 5 at 85 ns +Stimuli1 : in_valid = true in_value 8 at 86 ns +Display : 6 at 86 ns +Stimuli1 : in_valid = true in_value 9 at 87 ns +Display : 7 at 87 ns +Stimuli1 : in_valid = true in_value 10 at 88 ns +Display : 7 at 88 ns +Display : 9 at 89 ns +Display : 10 at 90 ns +Stimuli2 : in_valid = true in_value 0 at 93 ns +Stimuli2 : in_valid = true in_value 1 at 94 ns +Stimuli2 : in_valid = true in_value 2 at 95 ns +Stimuli2 : in_valid = true in_value 3 at 96 ns +Display : 10 at 96 ns +Stimuli2 : in_valid = true in_value 4 at 97 ns +Display : 2 at 97 ns +Stimuli2 : in_valid = true in_value 5 at 98 ns +Display : 3 at 98 ns +Stimuli2 : in_valid = true in_value 6 at 99 ns +Display : 4 at 99 ns +Stimuli2 : in_valid = true in_value 7 at 100 ns +Display : 5 at 100 ns +Stimuli2 : in_valid = true in_value 8 at 101 ns +Display : 6 at 101 ns +Stimuli2 : in_valid = true in_value 9 at 102 ns +Display : 6 at 102 ns +Stimuli2 : in_valid = true in_value 10 at 103 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/main.cpp new file mode 100644 index 000000000..b560aab5e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/main.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_exit.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_value; + sc_signal in_valid; + sc_signal result; + + + for_exit for_exit1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.cpp new file mode 100644 index 000000000..d45342c41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.h new file mode 100644 index 000000000..d8bccb0f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.cpp new file mode 100644 index 000000000..05c349065 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.h new file mode 100644 index 000000000..b50f526c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.cpp new file mode 100644 index 000000000..51836042c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_fsm.h" + +#define max 10 + +void for_fsm::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + wait(); + }; + out_valid.write(false); + wait(5); + + // execution of for loop with continues + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (inp_tmp<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + }; + }; + out_valid.write(false); + wait(5); + + // for loop with break + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + }; + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.f new file mode 100644 index 000000000..d1a3ca297 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.f @@ -0,0 +1,4 @@ +for_fsm/main.cpp +for_fsm/stimulus.cpp +for_fsm/display.cpp +for_fsm/for_fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.h new file mode 100644 index 000000000..790e686eb --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( for_fsm ) +{ + SC_HAS_PROCESS( for_fsm ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + for_fsm( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/golden/for_fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/golden/for_fsm.log new file mode 100644 index 000000000..3e6064ab7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/golden/for_fsm.log @@ -0,0 +1,180 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 1 at 6 ns +Stimuli1 : in_valid = true in_value 2 at 7 ns +Stimuli1 : in_valid = true in_value 3 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 4 at 9 ns +Display : 2 at 9 ns +Stimuli1 : in_valid = true in_value 5 at 10 ns +Display : 3 at 10 ns +Stimuli1 : in_valid = true in_value 6 at 11 ns +Display : 4 at 11 ns +Stimuli1 : in_valid = true in_value 7 at 12 ns +Display : 5 at 12 ns +Stimuli1 : in_valid = true in_value 8 at 13 ns +Display : 6 at 13 ns +Stimuli1 : in_valid = true in_value 9 at 14 ns +Display : 7 at 14 ns +Stimuli1 : in_valid = true in_value 10 at 15 ns +Display : 8 at 15 ns +Display : 9 at 16 ns +Display : 10 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 1 at 21 ns +Stimuli2 : in_valid = true in_value 2 at 22 ns +Stimuli2 : in_valid = true in_value 3 at 23 ns +Stimuli2 : in_valid = true in_value 4 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 5 at 25 ns +Display : 3 at 25 ns +Stimuli2 : in_valid = true in_value 6 at 26 ns +Display : 3 at 26 ns +Stimuli2 : in_valid = true in_value 7 at 27 ns +Display : 5 at 27 ns +Stimuli2 : in_valid = true in_value 8 at 28 ns +Display : 6 at 28 ns +Stimuli2 : in_valid = true in_value 9 at 29 ns +Display : 7 at 29 ns +Stimuli2 : in_valid = true in_value 10 at 30 ns +Display : 8 at 30 ns +Display : 9 at 31 ns +Display : 9 at 32 ns +Display : 10 at 33 ns +Display : 10 at 34 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Display : 10 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 3 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 6 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Stimuli1 : in_valid = true in_value 1 at 57 ns +Stimuli1 : in_valid = true in_value 2 at 58 ns +Stimuli1 : in_valid = true in_value 3 at 59 ns +Display : 6 at 59 ns +Stimuli1 : in_valid = true in_value 4 at 60 ns +Display : 2 at 60 ns +Stimuli1 : in_valid = true in_value 5 at 61 ns +Display : 3 at 61 ns +Stimuli1 : in_valid = true in_value 6 at 62 ns +Display : 4 at 62 ns +Stimuli1 : in_valid = true in_value 7 at 63 ns +Display : 5 at 63 ns +Stimuli1 : in_valid = true in_value 8 at 64 ns +Display : 6 at 64 ns +Stimuli1 : in_valid = true in_value 9 at 65 ns +Display : 7 at 65 ns +Stimuli1 : in_valid = true in_value 10 at 66 ns +Display : 8 at 66 ns +Display : 9 at 67 ns +Display : 10 at 68 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 1 at 72 ns +Stimuli2 : in_valid = true in_value 2 at 73 ns +Stimuli2 : in_valid = true in_value 3 at 74 ns +Stimuli2 : in_valid = true in_value 4 at 75 ns +Display : 10 at 75 ns +Stimuli2 : in_valid = true in_value 5 at 76 ns +Display : 3 at 76 ns +Stimuli2 : in_valid = true in_value 6 at 77 ns +Display : 3 at 77 ns +Stimuli2 : in_valid = true in_value 7 at 78 ns +Display : 5 at 78 ns +Stimuli2 : in_valid = true in_value 8 at 79 ns +Display : 6 at 79 ns +Stimuli2 : in_valid = true in_value 9 at 80 ns +Display : 7 at 80 ns +Stimuli2 : in_valid = true in_value 10 at 81 ns +Display : 8 at 81 ns +Display : 9 at 82 ns +Display : 9 at 83 ns +Display : 10 at 84 ns +Display : 10 at 85 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Display : 10 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 3 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 6 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Stimuli1 : in_valid = true in_value 1 at 108 ns +Stimuli1 : in_valid = true in_value 2 at 109 ns +Stimuli1 : in_valid = true in_value 3 at 110 ns +Display : 6 at 110 ns +Stimuli1 : in_valid = true in_value 4 at 111 ns +Display : 2 at 111 ns +Stimuli1 : in_valid = true in_value 5 at 112 ns +Display : 3 at 112 ns +Stimuli1 : in_valid = true in_value 6 at 113 ns +Display : 4 at 113 ns +Stimuli1 : in_valid = true in_value 7 at 114 ns +Display : 5 at 114 ns +Stimuli1 : in_valid = true in_value 8 at 115 ns +Display : 6 at 115 ns +Stimuli1 : in_valid = true in_value 9 at 116 ns +Display : 7 at 116 ns +Stimuli1 : in_valid = true in_value 10 at 117 ns +Display : 8 at 117 ns +Display : 9 at 118 ns +Display : 10 at 119 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 1 at 123 ns +Stimuli2 : in_valid = true in_value 2 at 124 ns +Stimuli2 : in_valid = true in_value 3 at 125 ns +Stimuli2 : in_valid = true in_value 4 at 126 ns +Display : 10 at 126 ns +Stimuli2 : in_valid = true in_value 5 at 127 ns +Display : 3 at 127 ns +Stimuli2 : in_valid = true in_value 6 at 128 ns +Display : 3 at 128 ns +Stimuli2 : in_valid = true in_value 7 at 129 ns +Display : 5 at 129 ns +Stimuli2 : in_valid = true in_value 8 at 130 ns +Display : 6 at 130 ns +Stimuli2 : in_valid = true in_value 9 at 131 ns +Display : 7 at 131 ns +Stimuli2 : in_valid = true in_value 10 at 132 ns +Display : 8 at 132 ns +Display : 9 at 133 ns +Display : 9 at 134 ns +Display : 10 at 135 ns +Display : 10 at 136 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Display : 10 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 3 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 6 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/main.cpp new file mode 100644 index 000000000..f9722f687 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/main.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_value; + sc_signal in_valid; + sc_signal result; + + + for_fsm for_fsm1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.cpp new file mode 100644 index 000000000..f61a6def4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(5); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(5); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.h new file mode 100644 index 000000000..d8bccb0f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.cpp new file mode 100644 index 000000000..3e8ba2ec1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.h new file mode 100644 index 000000000..b50f526c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/golden/while_datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/golden/while_datatypes.log new file mode 100644 index 000000000..ee8d4b026 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/golden/while_datatypes.log @@ -0,0 +1,186 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 2 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 3 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 4 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Display : 8 at 16 ns +Display : 9 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 10 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 10 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 10 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 7 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Display : 8 at 31 ns +Display : 8 at 32 ns +Display : 10 at 33 ns +Display : 10 at 34 ns +Display : 10 at 35 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 10 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 6 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Stimuli1 : in_valid = true in_value 0 at 57 ns +Stimuli1 : in_valid = true in_value 1 at 58 ns +Stimuli1 : in_valid = true in_value 2 at 59 ns +Display : 6 at 59 ns +Stimuli1 : in_valid = true in_value 3 at 60 ns +Display : 1 at 60 ns +Stimuli1 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli1 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli1 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli1 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli1 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli1 : in_valid = true in_value 9 at 66 ns +Display : 7 at 66 ns +Stimuli1 : in_valid = true in_value 10 at 67 ns +Display : 8 at 67 ns +Display : 9 at 68 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 0 at 72 ns +Stimuli2 : in_valid = true in_value 1 at 73 ns +Stimuli2 : in_valid = true in_value 2 at 74 ns +Stimuli2 : in_valid = true in_value 3 at 75 ns +Display : 10 at 75 ns +Stimuli2 : in_valid = true in_value 4 at 76 ns +Display : 10 at 76 ns +Stimuli2 : in_valid = true in_value 5 at 77 ns +Display : 10 at 77 ns +Stimuli2 : in_valid = true in_value 6 at 78 ns +Display : 10 at 78 ns +Stimuli2 : in_valid = true in_value 7 at 79 ns +Display : 5 at 79 ns +Stimuli2 : in_valid = true in_value 8 at 80 ns +Display : 6 at 80 ns +Stimuli2 : in_valid = true in_value 9 at 81 ns +Display : 7 at 81 ns +Stimuli2 : in_valid = true in_value 10 at 82 ns +Display : 8 at 82 ns +Display : 8 at 83 ns +Display : 10 at 84 ns +Display : 10 at 85 ns +Display : 10 at 86 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 10 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 6 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Stimuli1 : in_valid = true in_value 0 at 108 ns +Stimuli1 : in_valid = true in_value 1 at 109 ns +Stimuli1 : in_valid = true in_value 2 at 110 ns +Display : 6 at 110 ns +Stimuli1 : in_valid = true in_value 3 at 111 ns +Display : 1 at 111 ns +Stimuli1 : in_valid = true in_value 4 at 112 ns +Display : 2 at 112 ns +Stimuli1 : in_valid = true in_value 5 at 113 ns +Display : 3 at 113 ns +Stimuli1 : in_valid = true in_value 6 at 114 ns +Display : 4 at 114 ns +Stimuli1 : in_valid = true in_value 7 at 115 ns +Display : 5 at 115 ns +Stimuli1 : in_valid = true in_value 8 at 116 ns +Display : 6 at 116 ns +Stimuli1 : in_valid = true in_value 9 at 117 ns +Display : 7 at 117 ns +Stimuli1 : in_valid = true in_value 10 at 118 ns +Display : 8 at 118 ns +Display : 9 at 119 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 0 at 123 ns +Stimuli2 : in_valid = true in_value 1 at 124 ns +Stimuli2 : in_valid = true in_value 2 at 125 ns +Stimuli2 : in_valid = true in_value 3 at 126 ns +Display : 10 at 126 ns +Stimuli2 : in_valid = true in_value 4 at 127 ns +Display : 10 at 127 ns +Stimuli2 : in_valid = true in_value 5 at 128 ns +Display : 10 at 128 ns +Stimuli2 : in_valid = true in_value 6 at 129 ns +Display : 10 at 129 ns +Stimuli2 : in_valid = true in_value 7 at 130 ns +Display : 5 at 130 ns +Stimuli2 : in_valid = true in_value 8 at 131 ns +Display : 6 at 131 ns +Stimuli2 : in_valid = true in_value 9 at 132 ns +Display : 7 at 132 ns +Stimuli2 : in_valid = true in_value 10 at 133 ns +Display : 8 at 133 ns +Display : 8 at 134 ns +Display : 10 at 135 ns +Display : 10 at 136 ns +Display : 10 at 137 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 10 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 6 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/main.cpp new file mode 100644 index 000000000..259079b39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + while_datatypes while_datatypes1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.cpp new file mode 100644 index 000000000..af5159663 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.h new file mode 100644 index 000000000..e20114c36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.cpp new file mode 100644 index 000000000..e0b1ae585 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_datatypes.h" + +#define max 10 + +void while_datatypes::entry() +{ + + int i, inp_tmp; + sc_signed signed_counter(8); + sc_unsigned unsigned_counter(8); + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + i++; + wait(); + }; + out_valid.write(false); + wait(5); + + // execution of for loop with continues + out_valid.write(true); + signed_counter=0; + wait(); + do { + signed_counter++; + inp_tmp = in_value.read(); + if (signed_counter==8) { + wait(); + continue; + } else if (in_value.read()<5) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (signed_counter.to_int()<=max); + out_valid.write(false); + wait(5); + + // for loop with break + out_valid.write(true); + wait(); + unsigned_counter=0; + do { + unsigned_counter++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (unsigned_counter.to_uint()<=max); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.f new file mode 100644 index 000000000..bdd5c8d62 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.f @@ -0,0 +1,4 @@ +while_datatypes/main.cpp +while_datatypes/stimulus.cpp +while_datatypes/display.cpp +while_datatypes/while_datatypes.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.h new file mode 100644 index 000000000..40c6642b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( while_datatypes ) +{ + SC_HAS_PROCESS( while_datatypes ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + while_datatypes ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.cpp new file mode 100644 index 000000000..efa95d3cf --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.h new file mode 100644 index 000000000..4f696fcd3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/golden/while_exit.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/golden/while_exit.log new file mode 100644 index 000000000..b4ad00f9a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/golden/while_exit.log @@ -0,0 +1,183 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 2 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 3 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 4 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Display : 7 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Display : 7 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 7 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 7 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 7 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 7 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 6 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Display : 8 at 31 ns +Display : 9 at 32 ns +Display : 10 at 33 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Display : 10 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Display : 2 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 3 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 6 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Stimuli1 : in_valid = true in_value 0 at 57 ns +Stimuli1 : in_valid = true in_value 1 at 58 ns +Stimuli1 : in_valid = true in_value 2 at 59 ns +Display : 6 at 59 ns +Stimuli1 : in_valid = true in_value 3 at 60 ns +Display : 1 at 60 ns +Stimuli1 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli1 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli1 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli1 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli1 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli1 : in_valid = true in_value 9 at 66 ns +Display : 7 at 66 ns +Stimuli1 : in_valid = true in_value 10 at 67 ns +Stimuli2 : in_valid = true in_value 0 at 72 ns +Stimuli2 : in_valid = true in_value 1 at 73 ns +Display : 7 at 73 ns +Stimuli2 : in_valid = true in_value 2 at 74 ns +Display : 7 at 74 ns +Stimuli2 : in_valid = true in_value 3 at 75 ns +Display : 7 at 75 ns +Stimuli2 : in_valid = true in_value 4 at 76 ns +Display : 7 at 76 ns +Stimuli2 : in_valid = true in_value 5 at 77 ns +Display : 7 at 77 ns +Stimuli2 : in_valid = true in_value 6 at 78 ns +Display : 7 at 78 ns +Stimuli2 : in_valid = true in_value 7 at 79 ns +Display : 5 at 79 ns +Stimuli2 : in_valid = true in_value 8 at 80 ns +Display : 6 at 80 ns +Stimuli2 : in_valid = true in_value 9 at 81 ns +Display : 6 at 81 ns +Stimuli2 : in_valid = true in_value 10 at 82 ns +Display : 8 at 82 ns +Display : 9 at 83 ns +Display : 10 at 84 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Display : 10 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Display : 2 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 3 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 6 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Stimuli1 : in_valid = true in_value 0 at 108 ns +Stimuli1 : in_valid = true in_value 1 at 109 ns +Stimuli1 : in_valid = true in_value 2 at 110 ns +Display : 6 at 110 ns +Stimuli1 : in_valid = true in_value 3 at 111 ns +Display : 1 at 111 ns +Stimuli1 : in_valid = true in_value 4 at 112 ns +Display : 2 at 112 ns +Stimuli1 : in_valid = true in_value 5 at 113 ns +Display : 3 at 113 ns +Stimuli1 : in_valid = true in_value 6 at 114 ns +Display : 4 at 114 ns +Stimuli1 : in_valid = true in_value 7 at 115 ns +Display : 5 at 115 ns +Stimuli1 : in_valid = true in_value 8 at 116 ns +Display : 6 at 116 ns +Stimuli1 : in_valid = true in_value 9 at 117 ns +Display : 7 at 117 ns +Stimuli1 : in_valid = true in_value 10 at 118 ns +Stimuli2 : in_valid = true in_value 0 at 123 ns +Stimuli2 : in_valid = true in_value 1 at 124 ns +Display : 7 at 124 ns +Stimuli2 : in_valid = true in_value 2 at 125 ns +Display : 7 at 125 ns +Stimuli2 : in_valid = true in_value 3 at 126 ns +Display : 7 at 126 ns +Stimuli2 : in_valid = true in_value 4 at 127 ns +Display : 7 at 127 ns +Stimuli2 : in_valid = true in_value 5 at 128 ns +Display : 7 at 128 ns +Stimuli2 : in_valid = true in_value 6 at 129 ns +Display : 7 at 129 ns +Stimuli2 : in_valid = true in_value 7 at 130 ns +Display : 5 at 130 ns +Stimuli2 : in_valid = true in_value 8 at 131 ns +Display : 6 at 131 ns +Stimuli2 : in_valid = true in_value 9 at 132 ns +Display : 6 at 132 ns +Stimuli2 : in_valid = true in_value 10 at 133 ns +Display : 8 at 133 ns +Display : 9 at 134 ns +Display : 10 at 135 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Display : 10 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Display : 2 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 3 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 6 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/main.cpp new file mode 100644 index 000000000..7d176025e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_exit.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + while_exit while_exit1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.cpp new file mode 100644 index 000000000..d86f16758 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.h new file mode 100644 index 000000000..5bc8313de --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.cpp new file mode 100644 index 000000000..5cc53af40 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_exit.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_exit.h" + +#define max 10 + +void while_exit::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of while loop with exit after write statement + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + if (inp_tmp==7) { + wait(); + break; + } else { + i++; + wait(); + }; + }; + out_valid.write(false); + wait(6); + + // execution of do loop with continues + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (in_value.read()<5) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (i<=max); + out_valid.write(false); + wait(5); + + // execution of do loop with exit after before statement + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (i<=max); + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.f new file mode 100644 index 000000000..947eeefd1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.f @@ -0,0 +1,4 @@ +while_exit/main.cpp +while_exit/stimulus.cpp +while_exit/display.cpp +while_exit/while_exit.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.h new file mode 100644 index 000000000..a57397dd4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_exit.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( while_exit ) +{ + SC_HAS_PROCESS( while_exit ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + while_exit( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp new file mode 100644 index 000000000..3e8ba2ec1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h new file mode 100644 index 000000000..b50f526c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log new file mode 100644 index 000000000..acee1098d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log @@ -0,0 +1,183 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 1 at 6 ns +Stimuli1 : in_valid = true in_value 2 at 7 ns +Stimuli1 : in_valid = true in_value 3 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 4 at 9 ns +Display : 2 at 9 ns +Stimuli1 : in_valid = true in_value 5 at 10 ns +Display : 3 at 10 ns +Stimuli1 : in_valid = true in_value 6 at 11 ns +Display : 4 at 11 ns +Stimuli1 : in_valid = true in_value 7 at 12 ns +Display : 5 at 12 ns +Stimuli1 : in_valid = true in_value 8 at 13 ns +Display : 6 at 13 ns +Stimuli1 : in_valid = true in_value 9 at 14 ns +Display : 7 at 14 ns +Stimuli1 : in_valid = true in_value 10 at 15 ns +Display : 8 at 15 ns +Display : 9 at 16 ns +Display : 10 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 1 at 20 ns +Display : 10 at 20 ns +Stimuli2 : in_valid = true in_value 2 at 21 ns +Display : 10 at 21 ns +Stimuli2 : in_valid = true in_value 3 at 22 ns +Display : 10 at 22 ns +Stimuli2 : in_valid = true in_value 4 at 23 ns +Display : 10 at 23 ns +Stimuli2 : in_valid = true in_value 5 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 6 at 25 ns +Display : 10 at 25 ns +Stimuli2 : in_valid = true in_value 7 at 26 ns +Display : 5 at 26 ns +Stimuli2 : in_valid = true in_value 8 at 27 ns +Display : 6 at 27 ns +Stimuli2 : in_valid = true in_value 9 at 28 ns +Display : 6 at 28 ns +Stimuli2 : in_valid = true in_value 10 at 29 ns +Display : 8 at 29 ns +Display : 9 at 30 ns +Display : 10 at 31 ns +Stimuli3 : in_valid = true in_value 1 at 34 ns +Stimuli3 : in_valid = true in_value 2 at 35 ns +Stimuli3 : in_valid = true in_value 3 at 36 ns +Display : 10 at 36 ns +Stimuli3 : in_valid = true in_value 4 at 37 ns +Display : 2 at 37 ns +Stimuli3 : in_valid = true in_value 5 at 38 ns +Display : 3 at 38 ns +Stimuli3 : in_valid = true in_value 6 at 39 ns +Display : 4 at 39 ns +Stimuli3 : in_valid = true in_value 7 at 40 ns +Display : 5 at 40 ns +Stimuli3 : in_valid = true in_value 8 at 41 ns +Display : 6 at 41 ns +Stimuli3 : in_valid = true in_value 9 at 42 ns +Display : 6 at 42 ns +Stimuli3 : in_valid = true in_value 10 at 43 ns +Stimuli1 : in_valid = true in_value 1 at 54 ns +Stimuli1 : in_valid = true in_value 2 at 55 ns +Stimuli1 : in_valid = true in_value 3 at 56 ns +Display : 6 at 56 ns +Stimuli1 : in_valid = true in_value 4 at 57 ns +Display : 2 at 57 ns +Stimuli1 : in_valid = true in_value 5 at 58 ns +Display : 3 at 58 ns +Stimuli1 : in_valid = true in_value 6 at 59 ns +Display : 4 at 59 ns +Stimuli1 : in_valid = true in_value 7 at 60 ns +Display : 5 at 60 ns +Stimuli1 : in_valid = true in_value 8 at 61 ns +Display : 6 at 61 ns +Stimuli1 : in_valid = true in_value 9 at 62 ns +Display : 7 at 62 ns +Stimuli1 : in_valid = true in_value 10 at 63 ns +Display : 8 at 63 ns +Display : 9 at 64 ns +Display : 10 at 65 ns +Display : 10 at 66 ns +Stimuli2 : in_valid = true in_value 1 at 68 ns +Display : 10 at 68 ns +Stimuli2 : in_valid = true in_value 2 at 69 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 3 at 70 ns +Display : 10 at 70 ns +Stimuli2 : in_valid = true in_value 4 at 71 ns +Display : 10 at 71 ns +Stimuli2 : in_valid = true in_value 5 at 72 ns +Display : 10 at 72 ns +Stimuli2 : in_valid = true in_value 6 at 73 ns +Display : 10 at 73 ns +Stimuli2 : in_valid = true in_value 7 at 74 ns +Display : 5 at 74 ns +Stimuli2 : in_valid = true in_value 8 at 75 ns +Display : 6 at 75 ns +Stimuli2 : in_valid = true in_value 9 at 76 ns +Display : 6 at 76 ns +Stimuli2 : in_valid = true in_value 10 at 77 ns +Display : 8 at 77 ns +Display : 9 at 78 ns +Display : 10 at 79 ns +Stimuli3 : in_valid = true in_value 1 at 82 ns +Stimuli3 : in_valid = true in_value 2 at 83 ns +Stimuli3 : in_valid = true in_value 3 at 84 ns +Display : 10 at 84 ns +Stimuli3 : in_valid = true in_value 4 at 85 ns +Display : 2 at 85 ns +Stimuli3 : in_valid = true in_value 5 at 86 ns +Display : 3 at 86 ns +Stimuli3 : in_valid = true in_value 6 at 87 ns +Display : 4 at 87 ns +Stimuli3 : in_valid = true in_value 7 at 88 ns +Display : 5 at 88 ns +Stimuli3 : in_valid = true in_value 8 at 89 ns +Display : 6 at 89 ns +Stimuli3 : in_valid = true in_value 9 at 90 ns +Display : 6 at 90 ns +Stimuli3 : in_valid = true in_value 10 at 91 ns +Stimuli1 : in_valid = true in_value 1 at 102 ns +Stimuli1 : in_valid = true in_value 2 at 103 ns +Stimuli1 : in_valid = true in_value 3 at 104 ns +Display : 6 at 104 ns +Stimuli1 : in_valid = true in_value 4 at 105 ns +Display : 2 at 105 ns +Stimuli1 : in_valid = true in_value 5 at 106 ns +Display : 3 at 106 ns +Stimuli1 : in_valid = true in_value 6 at 107 ns +Display : 4 at 107 ns +Stimuli1 : in_valid = true in_value 7 at 108 ns +Display : 5 at 108 ns +Stimuli1 : in_valid = true in_value 8 at 109 ns +Display : 6 at 109 ns +Stimuli1 : in_valid = true in_value 9 at 110 ns +Display : 7 at 110 ns +Stimuli1 : in_valid = true in_value 10 at 111 ns +Display : 8 at 111 ns +Display : 9 at 112 ns +Display : 10 at 113 ns +Display : 10 at 114 ns +Stimuli2 : in_valid = true in_value 1 at 116 ns +Display : 10 at 116 ns +Stimuli2 : in_valid = true in_value 2 at 117 ns +Display : 10 at 117 ns +Stimuli2 : in_valid = true in_value 3 at 118 ns +Display : 10 at 118 ns +Stimuli2 : in_valid = true in_value 4 at 119 ns +Display : 10 at 119 ns +Stimuli2 : in_valid = true in_value 5 at 120 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 6 at 121 ns +Display : 10 at 121 ns +Stimuli2 : in_valid = true in_value 7 at 122 ns +Display : 5 at 122 ns +Stimuli2 : in_valid = true in_value 8 at 123 ns +Display : 6 at 123 ns +Stimuli2 : in_valid = true in_value 9 at 124 ns +Display : 6 at 124 ns +Stimuli2 : in_valid = true in_value 10 at 125 ns +Display : 8 at 125 ns +Display : 9 at 126 ns +Display : 10 at 127 ns +Stimuli3 : in_valid = true in_value 1 at 130 ns +Stimuli3 : in_valid = true in_value 2 at 131 ns +Stimuli3 : in_valid = true in_value 3 at 132 ns +Display : 10 at 132 ns +Stimuli3 : in_valid = true in_value 4 at 133 ns +Display : 2 at 133 ns +Stimuli3 : in_valid = true in_value 5 at 134 ns +Display : 3 at 134 ns +Stimuli3 : in_valid = true in_value 6 at 135 ns +Display : 4 at 135 ns +Stimuli3 : in_valid = true in_value 7 at 136 ns +Display : 5 at 136 ns +Stimuli3 : in_valid = true in_value 8 at 137 ns +Display : 6 at 137 ns +Stimuli3 : in_valid = true in_value 9 at 138 ns +Display : 6 at 138 ns +Stimuli3 : in_valid = true in_value 10 at 139 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp new file mode 100644 index 000000000..69ab12ad6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + while_fsm while_fsm1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp new file mode 100644 index 000000000..61049e207 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(4); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h new file mode 100644 index 000000000..e20114c36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp new file mode 100644 index 000000000..a3f08d992 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_fsm.h" + +#define max 10 + +void while_fsm::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + i++; + wait(); + }; + out_valid.write(false); + wait(); + + // execution of for loop with continues + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (in_value.read()<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (i<=max); + out_valid.write(false); + wait(); + wait(3); + + // for loop with break + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (i<=max); + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f new file mode 100644 index 000000000..e47e026a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f @@ -0,0 +1,4 @@ +while_fsm/main.cpp +while_fsm/stimulus.cpp +while_fsm/display.cpp +while_fsm/while_fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h new file mode 100644 index 000000000..75fd0080c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( while_fsm ) +{ + SC_HAS_PROCESS( while_fsm ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + while_fsm( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; -- cgit v1.2.3