From 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 24 May 2018 01:37:55 -0700 Subject: systemc: Import tests from the Accellera systemc distribution. Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini Maintainer: Gabe Black --- .../tests/systemc/misc/sim_tests/srlatch/main.cpp | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp (limited to 'src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp') diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp b/src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp new file mode 100644 index 000000000..4c7929dc1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine for nor-based SR latch */ + +#include "testbench.h" +#include "nor.h" + +int +sc_main(int ac, char *av[]) +{ + sc_signal s; + sc_signal r; + sc_signal q; + sc_signal qp; + + /* Signal initialization to make sure that we do not have an infinite loop of evaluate-update cycles */ + s = true; + r = true; + + sc_clock clk("Clock"); + + testbench T("TB", clk, q, qp, s, r); + nor G1("G1", s, qp, q); + nor G2("G2", r, q, qp); + + sc_start(); + return 0; +} -- cgit v1.2.3