From 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 24 May 2018 01:37:55 -0700 Subject: systemc: Import tests from the Accellera systemc distribution. Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini Maintainer: Gabe Black --- .../golden/std_ulogic_vector_datatype.log.linux64 | 203 +++++++++++++++++++++ 1 file changed, 203 insertions(+) create mode 100644 src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64 (limited to 'src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64') diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64 b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64 new file mode 100644 index 000000000..d168d15ca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64 @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 8 bytes +UNSIGNED LONG SIZE = 8 bytes +SIGNED LONG SIZE = 8 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ -- cgit v1.2.3