From 024ec4c5c310b1225a52532d41d5cc9f2633ae6c Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <stever@gmail.com>
Date: Fri, 13 Jun 2008 01:29:20 -0400
Subject: Get rid of bogus cache assertion. I was asserting that the only
 reason you would defer targets is if a write came in while you had an
 outstanding read miss, but there's another case where you could get a read
 access after you've snooped an invalidation and buffered it because it
 applies to a prior outstanding miss.

---
 src/mem/cache/cache_impl.hh | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src')

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 7bab3012b..3b56c0a2e 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -823,7 +823,6 @@ Cache<TagStore>::handleResponse(PacketPtr pkt)
     }
 
     if (mshr->promoteDeferredTargets()) {
-        assert(mshr->needsExclusive() && !blk->isWritable());
         // avoid later read getting stale data while write miss is
         // outstanding.. see comment in timingAccess()
         blk->status &= ~BlkReadable;
-- 
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