From 2a1c102f25e097ecbec303815182c9bd5332c2ef Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 6 Apr 2007 16:00:56 +0000 Subject: Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. --HG-- rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf --- src/arch/x86/isa/formats/formats.isa | 3 - src/arch/x86/isa/formats/macroop.isa | 133 ---------------------------------- src/arch/x86/isa/macroop.isa | 137 +++++++++++++++++++++++++++++++++++ src/arch/x86/isa/main.isa | 28 ++++--- src/arch/x86/isa/microasm.isa | 2 +- src/arch/x86/isa/microops/base.isa | 3 + 6 files changed, 159 insertions(+), 147 deletions(-) delete mode 100644 src/arch/x86/isa/formats/macroop.isa create mode 100644 src/arch/x86/isa/macroop.isa (limited to 'src') diff --git a/src/arch/x86/isa/formats/formats.isa b/src/arch/x86/isa/formats/formats.isa index f4e5c402f..d763c05bc 100644 --- a/src/arch/x86/isa/formats/formats.isa +++ b/src/arch/x86/isa/formats/formats.isa @@ -95,9 +95,6 @@ //malfunction of the decode mechanism. ##include "error.isa" -//Include code to build up macro op instructions -##include "macroop.isa" - //Include a format which implements a batch of instructions which do the same //thing on a variety of inputs ##include "multi.isa" diff --git a/src/arch/x86/isa/formats/macroop.isa b/src/arch/x86/isa/formats/macroop.isa deleted file mode 100644 index 455f4a496..000000000 --- a/src/arch/x86/isa/formats/macroop.isa +++ /dev/null @@ -1,133 +0,0 @@ -// -*- mode:c++ -*- - -// Copyright (c) 2007 The Hewlett-Packard Development Company -// All rights reserved. -// -// Redistribution and use of this software in source and binary forms, -// with or without modification, are permitted provided that the -// following conditions are met: -// -// The software must be used only for Non-Commercial Use which means any -// use which is NOT directed to receiving any direct monetary -// compensation for, or commercial advantage from such use. Illustrative -// examples of non-commercial use are academic research, personal study, -// teaching, education and corporate research & development. -// Illustrative examples of commercial use are distributing products for -// commercial advantage and providing services using the software for -// commercial advantage. -// -// If you wish to use this software or functionality therein that may be -// covered by patents for commercial use, please contact: -// Director of Intellectual Property Licensing -// Office of Strategy and Technology -// Hewlett-Packard Company -// 1501 Page Mill Road -// Palo Alto, California 94304 -// -// Redistributions of source code must retain the above copyright notice, -// this list of conditions and the following disclaimer. Redistributions -// in binary form must reproduce the above copyright notice, this list of -// conditions and the following disclaimer in the documentation and/or -// other materials provided with the distribution. Neither the name of -// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its -// contributors may be used to endorse or promote products derived from -// this software without specific prior written permission. No right of -// sublicense is granted herewith. Derivatives of the software and -// output created using the software may be prepared, but only for -// Non-Commercial Uses. Derivatives of the software may be shared with -// others provided: (i) the others agree to abide by the list of -// conditions herein which includes the Non-Commercial Use restrictions; -// and (ii) such Derivatives of the software include the above copyright -// notice to acknowledge the contribution from this software where -// applicable, this list of conditions and the disclaimer below. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -// Authors: Gabe Black - -//////////////////////////////////////////////////////////////////// -// -// Instructions that do the same thing to multiple sets of arguments. -// - -output header {{ - - // Base class for most macroops, except ones that need to commit as - // they go. - class X86MacroInst : public X86StaticInst - { - protected: - const uint32_t numMicroOps; - - //Constructor. - X86MacroInst(const char *mnem, ExtMachInst _machInst, - uint32_t _numMicroOps) - : X86StaticInst(mnem, _machInst, No_OpClass), - numMicroOps(_numMicroOps) - { - assert(numMicroOps); - microOps = new StaticInstPtr[numMicroOps]; - flags[IsMacroOp] = true; - } - - ~X86MacroInst() - { - delete [] microOps; - } - - StaticInstPtr * microOps; - - StaticInstPtr fetchMicroOp(MicroPC microPC) - { - assert(microPC < numMicroOps); - return microOps[microPC]; - } - - %(BasicExecPanic)s - }; -}}; - -// Basic instruction class constructor template. -def template MacroConstructor {{ - inline %(class_name)s::%(class_name)s(ExtMachInst machInst) - : %(base_class)s("%(mnemonic)s", machInst, %(num_micro_ops)s) - { - %(constructor)s; - //alloc_micro_ops is the code that sets up the microOps - //array in the parent class. - %(alloc_micro_ops)s; - } -}}; - -let {{ - def genMacroOp(name, Name, opSeq, rolling = False): - baseClass = 'X86MacroInst' - numMicroOps = len(opSeq.ops) - allocMicroOps = '' - micropc = 0 - for op in opSeq.ops: - allocMicroOps += \ - "microOps[%d] = %s;\n" % \ - (micropc, op.getAllocator(True, not rolling, - micropc == 0, - micropc == numMicroOps - 1)) - micropc += 1 - iop = InstObjParams(name, Name, baseClass, - {'code' : '', 'num_micro_ops' : numMicroOps, - 'alloc_micro_ops' : allocMicroOps}) - header_output = BasicDeclare.subst(iop) - decoder_output = MacroConstructor.subst(iop) - decode_block = BasicDecode.subst(iop) - exec_output = '' - return (header_output, decoder_output, decode_block, exec_output) -}}; diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa new file mode 100644 index 000000000..7d41a2dea --- /dev/null +++ b/src/arch/x86/isa/macroop.isa @@ -0,0 +1,137 @@ +// -*- mode:c++ -*- + +// Copyright (c) 2007 The Hewlett-Packard Development Company +// All rights reserved. +// +// Redistribution and use of this software in source and binary forms, +// with or without modification, are permitted provided that the +// following conditions are met: +// +// The software must be used only for Non-Commercial Use which means any +// use which is NOT directed to receiving any direct monetary +// compensation for, or commercial advantage from such use. Illustrative +// examples of non-commercial use are academic research, personal study, +// teaching, education and corporate research & development. +// Illustrative examples of commercial use are distributing products for +// commercial advantage and providing services using the software for +// commercial advantage. +// +// If you wish to use this software or functionality therein that may be +// covered by patents for commercial use, please contact: +// Director of Intellectual Property Licensing +// Office of Strategy and Technology +// Hewlett-Packard Company +// 1501 Page Mill Road +// Palo Alto, California 94304 +// +// Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. Redistributions +// in binary form must reproduce the above copyright notice, this list of +// conditions and the following disclaimer in the documentation and/or +// other materials provided with the distribution. Neither the name of +// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. No right of +// sublicense is granted herewith. Derivatives of the software and +// output created using the software may be prepared, but only for +// Non-Commercial Uses. Derivatives of the software may be shared with +// others provided: (i) the others agree to abide by the list of +// conditions herein which includes the Non-Commercial Use restrictions; +// and (ii) such Derivatives of the software include the above copyright +// notice to acknowledge the contribution from this software where +// applicable, this list of conditions and the disclaimer below. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Authors: Gabe Black + +// Execute method for macroops. +def template MacroExecPanic {{ + Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const + { + panic("Tried to execute macroop directly!"); + M5_DUMMY_RETURN + } +}}; + +output header {{ + + // Base class for most macroops, except ones that need to commit as + // they go. + class X86MacroInst : public StaticInst + { + protected: + const uint32_t numMicroOps; + + //Constructor. + X86MacroInst(const char *mnem, ExtMachInst _machInst, + uint32_t _numMicroOps) + : StaticInst(mnem, _machInst, No_OpClass), + numMicroOps(_numMicroOps) + { + assert(numMicroOps); + microOps = new StaticInstPtr[numMicroOps]; + flags[IsMacroOp] = true; + } + + ~X86MacroInst() + { + delete [] microOps; + } + + StaticInstPtr * microOps; + + StaticInstPtr fetchMicroOp(MicroPC microPC) + { + assert(microPC < numMicroOps); + return microOps[microPC]; + } + + %(MacroExecPanic)s + }; +}}; + +// Basic instruction class constructor template. +def template MacroConstructor {{ + inline %(class_name)s::%(class_name)s(ExtMachInst machInst) + : %(base_class)s("%(mnemonic)s", machInst, %(num_micro_ops)s) + { + %(constructor)s; + //alloc_micro_ops is the code that sets up the microOps + //array in the parent class. + %(alloc_micro_ops)s; + } +}}; + +let {{ + def genMacroOp(name, Name, opSeq): + baseClass = 'X86MacroInst' + numMicroOps = len(opSeq.ops) + allocMicroOps = '' + micropc = 0 + for op in opSeq.ops: + allocMicroOps += \ + "microOps[%d] = %s;\n" % \ + (micropc, op.getAllocator(True, op.delayed, + micropc == 0, + micropc == numMicroOps - 1)) + micropc += 1 + iop = InstObjParams(name, Name, baseClass, + {'code' : '', 'num_micro_ops' : numMicroOps, + 'alloc_micro_ops' : allocMicroOps}) + header_output = BasicDeclare.subst(iop) + decoder_output = MacroConstructor.subst(iop) + decode_block = BasicDecode.subst(iop) + exec_output = '' + return (header_output, decoder_output, decode_block, exec_output) +}}; diff --git a/src/arch/x86/isa/main.isa b/src/arch/x86/isa/main.isa index cc3a9bee4..d9e90689d 100644 --- a/src/arch/x86/isa/main.isa +++ b/src/arch/x86/isa/main.isa @@ -72,26 +72,34 @@ namespace X86ISA; -//Include the simple microcode assembler +//Include the simple microcode assembler. This will hopefully stay +//unspecialized for x86 and can later be made available to other ISAs. ##include "microasm.isa" -//Include the bitfield definitions -##include "bitfields.isa" - -//Include the operand_types and operand definitions -##include "operands.isa" +//Include code to build macroops. +##include "macroop.isa" //Include the base class for x86 instructions, and some support code +//Code in this file should be general and useful everywhere ##include "base.isa" -//Include the instruction definitions -##include "insts/insts.isa" - //Include the definitions for the instruction formats ##include "formats/formats.isa" -//Include the definitions of the micro ops +//Include the operand_types and operand definitions. These are needed by +//the microop definitions. +##include "operands.isa" + +//Include the definitions of the micro ops. +//These are StaticInst classes which stand on their own and make up an +//internal instruction set. ##include "microops/microops.isa" +//Include the instruction definitions which are microop assembler programs. +##include "insts/insts.isa" + +//Include the bitfield definitions +##include "bitfields.isa" + //Include the decoder definition ##include "decoder/decoder.isa" diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index b94b55aab..0d9c2bc4c 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -69,7 +69,7 @@ let {{ # use that directly. newStmnt = '' if len(ops) == 1: - decode_block = "return (X86StaticInst *)(%s);" % \ + decode_block = "return %s;" % \ ops[0].getAllocator() return ('', '', decode_block, '') else: diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa index b1351d999..beaa44b97 100644 --- a/src/arch/x86/isa/microops/base.isa +++ b/src/arch/x86/isa/microops/base.isa @@ -69,6 +69,9 @@ output header {{ class X86MicroOpBase : public X86StaticInst { protected: + uint8_t opSize; + uint8_t addrSize; + X86MicroOpBase(bool isMicro, bool isDelayed, bool isFirst, bool isLast, const char *mnem, ExtMachInst _machInst, -- cgit v1.2.3