From 4683cd165575d6e1c5a309f10a96f4d592d7a386 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:10 -0500
Subject: ARM: Define the setend instruction.

---
 src/arch/arm/isa/insts/misc.isa | 12 ++++++++++++
 1 file changed, 12 insertions(+)

(limited to 'src')

diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 7ec18c9e9..c7caf5cb7 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -534,4 +534,16 @@ let {{
     header_output += BasicDeclare.subst(leavexIop)
     decoder_output += BasicConstructor.subst(leavexIop)
     exec_output += PredOpExecute.subst(leavexIop)
+
+    setendCode = '''
+        CPSR cpsr = Cpsr;
+        cpsr.e = imm;
+        Cpsr = cpsr;
+    '''
+    setendIop = InstObjParams("setend", "Setend", "ImmOp",
+                              { "code": setendCode,
+                                "predicate_test": predicateTest }, [])
+    header_output += ImmOpDeclare.subst(setendIop)
+    decoder_output += ImmOpConstructor.subst(setendIop)
+    exec_output += PredOpExecute.subst(setendIop)
 }};
-- 
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