From 6456cb535cce8b35c36fa0366fc8766ecffbbf44 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 6 Dec 2006 05:54:16 -0500
Subject: Added in endianness conversion on memory accesses as the data goes
out. This will break the checker!
--HG--
extra : convert_revision : b8191cab09ab8f3ced05693293f058382319ed8e
---
src/cpu/o3/lsq_unit_impl.hh | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
(limited to 'src')
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 4facea9f9..379724166 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -596,7 +596,11 @@ LSQUnit<Impl>::writebackStores()
assert(!inst->memData);
inst->memData = new uint8_t[64];
- memcpy(inst->memData, (uint8_t *)&storeQueue[storeWBIdx].data,
+
+ TheISA::IntReg convertedData =
+ TheISA::htog(storeQueue[storeWBIdx].data);
+
+ memcpy(inst->memData, (uint8_t *)&convertedData,
req->getSize());
PacketPtr data_pkt = new Packet(req, Packet::WriteReq, Packet::Broadcast);
--
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