From 64ed39f61b89675237e145ed4a81b49f353921ed Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 24 Jan 2009 07:27:22 -0800 Subject: pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu. It's instantaneous and so it's somewhat bogus, but it's a first step. --- src/arch/alpha/isa/decoder.isa | 3 +++ src/sim/pseudo_inst.cc | 9 +++++++++ src/sim/pseudo_inst.hh | 1 + 3 files changed, 13 insertions(+) (limited to 'src') diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa index f057f00cc..67bc5c7a2 100644 --- a/src/arch/alpha/isa/decoder.isa +++ b/src/arch/alpha/isa/decoder.isa @@ -815,6 +815,9 @@ decode OPCODE default Unknown::unknown() { 0x07: rpns({{ R0 = PseudoInst::rpns(xc->tcBase()); }}, IsNonSpeculative, IsUnverifiable); + 0x09: wakeCPU({{ + PseudoInst::wakeCPU(xc->tcBase(), R16); + }}, IsNonSpeculative, IsUnverifiable); 0x10: deprecated_ivlb({{ warn_once("Obsolete M5 ivlb instruction encountered.\n"); }}); diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc index 130a2f0fe..f1cf2835d 100644 --- a/src/sim/pseudo_inst.cc +++ b/src/sim/pseudo_inst.cc @@ -137,6 +137,15 @@ rpns(ThreadContext *tc) return curTick / Clock::Int::ns; } +void +wakeCPU(ThreadContext *tc, uint64_t cpuid) +{ + System *sys = tc->getSystemPtr(); + ThreadContext *other_tc = sys->threadContexts[cpuid]; + if (other_tc->status() == ThreadContext::Suspended) + other_tc->activate(); +} + void m5exit(ThreadContext *tc, Tick delay) { diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index 7d013eda7..30996fc3b 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -55,6 +55,7 @@ void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr); #endif uint64_t rpns(ThreadContext *tc); +void wakeCPU(ThreadContext *tc, uint64_t cpuid); void m5exit(ThreadContext *tc, Tick delay); void resetstats(ThreadContext *tc, Tick delay, Tick period); void dumpstats(ThreadContext *tc, Tick delay, Tick period); -- cgit v1.2.3