From 0a2387f38c6887f688144a18e0d7ff50e80bd04c Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Mon, 23 Oct 2006 18:43:56 -0400 Subject: make this parallel to the other cpu types so that resume works correctly. --HG-- extra : convert_revision : 3c165af27ea0e6c7f2a17819c1717d8900f54cc1 --- src/cpu/simple/atomic.cc | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index fe421ae6c..87ecafd69 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -182,11 +182,14 @@ AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion) void AtomicSimpleCPU::resume() { - changeState(SimObject::Running); - if (thread->status() == ThreadContext::Active) { + if (_status != SwitchedOut && _status != Idle) { assert(system->getMemoryMode() == System::Atomic); - if (!tickEvent.scheduled()) - tickEvent.schedule(curTick); + + changeState(SimObject::Running); + if (thread->status() == ThreadContext::Active) { + if (!tickEvent.scheduled()) + tickEvent.schedule(curTick); + } } } -- cgit v1.2.3 From 4da3938ed99e3691cfb16c275eea659cbaaa6c30 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Mon, 23 Oct 2006 18:45:30 -0400 Subject: get rid of the "resume" step at the end of changeToTiming/Atomic because this will cause an assertion when you do the CPU switch. instead, push the responsibility of the resume upwards towards the user - documented in se.py and fs.py so it should be ok. --HG-- extra : convert_revision : 7530cf140844e18cc26df80057f8760f29ec952b --- src/python/m5/__init__.py | 3 --- 1 file changed, 3 deletions(-) (limited to 'src') diff --git a/src/python/m5/__init__.py b/src/python/m5/__init__.py index 03e0508fb..d41fd5a61 100644 --- a/src/python/m5/__init__.py +++ b/src/python/m5/__init__.py @@ -150,7 +150,6 @@ def changeToAtomic(system): doDrain(system) print "Changing memory mode to atomic" system.changeTiming(cc_main.SimObject.Atomic) - resume(system) def changeToTiming(system): if not isinstance(system, objects.Root) and not isinstance(system, objects.System): @@ -159,7 +158,6 @@ def changeToTiming(system): doDrain(system) print "Changing memory mode to timing" system.changeTiming(cc_main.SimObject.Timing) - resume(system) def switchCpus(cpuList): print "switching cpus" @@ -190,7 +188,6 @@ def switchCpus(cpuList): cc_main.cleanupCountedDrain(drain_event) # Now all of the CPUs are ready to be switched out for old_cpu in old_cpus: - print "switching" old_cpu._ccObject.switchOut() index = 0 for new_cpu in new_cpus: -- cgit v1.2.3