From 8d2e51c7f52670055ffe97e221302561b87015a2 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 17 May 2009 14:34:52 -0700 Subject: includes: sort includes again --- src/arch/alpha/isa_traits.hh | 2 +- src/arch/alpha/predecoder.hh | 2 +- src/arch/arm/utility.hh | 2 +- src/arch/mips/dsp.hh | 2 +- src/arch/mips/isa_traits.hh | 2 +- src/arch/mips/utility.hh | 5 +---- src/arch/sparc/isa_traits.hh | 2 +- src/arch/sparc/predecoder.hh | 2 +- src/arch/sparc/regfile.hh | 4 ++-- src/arch/x86/bios/acpi.hh | 6 +++--- src/arch/x86/bios/e820.hh | 6 +++--- src/arch/x86/bios/intelmp.cc | 2 +- src/arch/x86/bios/smbios.cc | 2 +- src/arch/x86/bios/smbios.hh | 2 +- src/arch/x86/intmessage.hh | 2 +- src/arch/x86/miscregfile.hh | 4 ++-- src/arch/x86/pagetable.hh | 2 +- src/arch/x86/pagetable_walker.hh | 2 +- src/arch/x86/predecoder.cc | 2 +- src/arch/x86/regfile.hh | 4 ++-- src/arch/x86/utility.hh | 2 +- src/arch/x86/x86_traits.hh | 2 +- src/base/cp_annotate.hh | 15 ++++++++------- src/base/crc.cc | 2 +- src/base/inet.cc | 2 +- src/base/inet.hh | 2 +- src/base/intmath.hh | 8 ++++---- src/base/misc.cc | 2 +- src/base/pollevent.cc | 4 ++-- src/base/res_list.hh | 3 ++- src/base/statistics.hh | 2 +- src/base/stats/mysql.cc | 2 +- src/base/stats/output.cc | 2 +- src/cpu/exetrace.hh | 10 +++++----- src/cpu/inorder/comm.hh | 2 +- src/cpu/inorder/inorder_trace.hh | 13 ++++++------- src/cpu/inteltrace.hh | 9 ++++----- src/cpu/legiontrace.hh | 8 ++++---- src/cpu/nativetrace.hh | 13 ++++++------- src/cpu/o3/2bit_local_pred.hh | 6 +++--- src/cpu/o3/bpred_unit.hh | 8 +++----- src/cpu/o3/comm.hh | 4 ++-- src/cpu/o3/fetch_impl.hh | 8 +++----- src/cpu/o3/inst_queue.hh | 2 +- src/cpu/o3/ras.hh | 3 ++- src/cpu/o3/store_set.hh | 2 +- src/cpu/o3/tournament_pred.hh | 5 +++-- src/cpu/ozone/ea_list.hh | 2 +- src/cpu/ozone/inst_queue.hh | 2 +- src/cpu/ozone/null_predictor.hh | 2 +- src/cpu/simple/base.cc | 9 ++++----- src/cpu/simple_thread.hh | 2 +- src/cpu/static_inst.hh | 4 ++-- src/cpu/thread_context.hh | 4 ++-- src/dev/alpha/backdoor.hh | 2 +- src/dev/etherlink.hh | 6 +++--- src/dev/etherpkt.hh | 2 +- src/dev/intel_8254_timer.hh | 2 +- src/dev/mips/backdoor.hh | 4 ++-- src/dev/ns_gige.cc | 2 +- src/dev/sinic.cc | 4 ++-- src/dev/x86/intdev.hh | 2 +- src/dev/x86/south_bridge.cc | 2 +- src/kern/tru64/dump_mbuf.cc | 10 +++++----- src/kern/tru64/mbuf.hh | 2 +- src/mem/bus.hh | 4 ++-- src/mem/cache/cache_impl.hh | 9 +++------ src/mem/cache/mshr.cc | 10 +++++----- src/mem/cache/tags/fa_lru.cc | 5 ++--- src/mem/cache/tags/fa_lru.hh | 10 +++++----- src/mem/cache/tags/iic_repl/gen.cc | 2 +- src/mem/cache/tags/iic_repl/repl.hh | 3 +-- src/mem/cache/tags/lru.hh | 12 ++++++------ src/mem/gems_common/util.cc | 3 ++- src/mem/packet.hh | 3 +-- src/mem/page_table.hh | 10 +++++----- src/mem/physical.cc | 2 +- src/mem/ruby/common/Debug.hh | 7 ++++--- src/mem/ruby/common/Global.hh | 6 +++--- src/mem/ruby/network/orion/power_ll.cc | 4 ++-- src/mem/ruby/network/orion/power_utils.cc | 7 ++++--- src/mem/rubymem.cc | 20 ++++++++------------ src/mem/slicc/slicc_global.hh | 4 +--- src/python/swig/core.i | 2 +- src/python/swig/event.i | 5 +++-- src/python/swig/pyobject.hh | 2 +- src/python/swig/sim_object.i | 1 + src/sim/arguments.hh | 4 ++-- src/sim/eventq.hh | 2 +- src/sim/init.cc | 2 +- src/sim/insttracer.hh | 2 +- src/sim/sim_object.cc | 4 ++-- src/sim/simulate.cc | 4 ++-- src/sim/syscall_emul.hh | 2 +- src/unittest/rangemaptest.cc | 3 ++- src/unittest/rangemultimaptest.cc | 2 +- 96 files changed, 202 insertions(+), 215 deletions(-) (limited to 'src') diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh index aae8271ce..f7114e5cc 100644 --- a/src/arch/alpha/isa_traits.hh +++ b/src/arch/alpha/isa_traits.hh @@ -37,8 +37,8 @@ namespace LittleEndianGuest {} #include "arch/alpha/ipr.hh" #include "arch/alpha/max_inst_regs.hh" #include "arch/alpha/types.hh" -#include "config/full_system.hh" #include "base/types.hh" +#include "config/full_system.hh" class StaticInstPtr; diff --git a/src/arch/alpha/predecoder.hh b/src/arch/alpha/predecoder.hh index d18bb2402..913bd8764 100644 --- a/src/arch/alpha/predecoder.hh +++ b/src/arch/alpha/predecoder.hh @@ -33,8 +33,8 @@ #include "arch/alpha/types.hh" #include "base/misc.hh" -#include "config/full_system.hh" #include "base/types.hh" +#include "config/full_system.hh" class ThreadContext; diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh index e26a00706..e0ae7cd2e 100644 --- a/src/arch/arm/utility.hh +++ b/src/arch/arm/utility.hh @@ -35,9 +35,9 @@ #include "arch/arm/types.hh" #include "base/misc.hh" +#include "base/types.hh" #include "config/full_system.hh" #include "cpu/thread_context.hh" -#include "base/types.hh" class ThreadContext; diff --git a/src/arch/mips/dsp.hh b/src/arch/mips/dsp.hh index dbada893a..a3d6c1a8f 100755 --- a/src/arch/mips/dsp.hh +++ b/src/arch/mips/dsp.hh @@ -34,8 +34,8 @@ #include "arch/mips/types.hh" #include "arch/mips/isa_traits.hh" #include "base/misc.hh" -#include "config/full_system.hh" #include "base/types.hh" +#include "config/full_system.hh" class ThreadContext; diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh index b091adb5d..7522dcf0f 100644 --- a/src/arch/mips/isa_traits.hh +++ b/src/arch/mips/isa_traits.hh @@ -36,8 +36,8 @@ #include "arch/mips/types.hh" #include "arch/mips/mips_core_specific.hh" -#include "config/full_system.hh" #include "base/types.hh" +#include "config/full_system.hh" namespace LittleEndianGuest {}; diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh index 95b7c875e..1c77b6ff2 100644 --- a/src/arch/mips/utility.hh +++ b/src/arch/mips/utility.hh @@ -37,11 +37,8 @@ #include "arch/mips/types.hh" #include "arch/mips/isa_traits.hh" #include "base/misc.hh" -#include "config/full_system.hh" -//XXX This is needed for size_t. We should use something other than size_t -//#include "kern/linux/linux.hh" #include "base/types.hh" - +#include "config/full_system.hh" #include "cpu/thread_context.hh" class ThreadContext; diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh index 1c783a9b9..00dadcf3d 100644 --- a/src/arch/sparc/isa_traits.hh +++ b/src/arch/sparc/isa_traits.hh @@ -35,8 +35,8 @@ #include "arch/sparc/types.hh" #include "arch/sparc/max_inst_regs.hh" #include "arch/sparc/sparc_traits.hh" -#include "config/full_system.hh" #include "base/types.hh" +#include "config/full_system.hh" class StaticInstPtr; diff --git a/src/arch/sparc/predecoder.hh b/src/arch/sparc/predecoder.hh index c7503b282..7775e858e 100644 --- a/src/arch/sparc/predecoder.hh +++ b/src/arch/sparc/predecoder.hh @@ -33,8 +33,8 @@ #include "arch/sparc/types.hh" #include "base/misc.hh" -#include "cpu/thread_context.hh" #include "base/types.hh" +#include "cpu/thread_context.hh" class ThreadContext; diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh index f732c9625..7da302eb7 100644 --- a/src/arch/sparc/regfile.hh +++ b/src/arch/sparc/regfile.hh @@ -32,6 +32,8 @@ #ifndef __ARCH_SPARC_REGFILE_HH__ #define __ARCH_SPARC_REGFILE_HH__ +#include + #include "arch/sparc/floatregfile.hh" #include "arch/sparc/intregfile.hh" #include "arch/sparc/isa_traits.hh" @@ -39,8 +41,6 @@ #include "arch/sparc/types.hh" #include "base/types.hh" -#include - class Checkpoint; namespace SparcISA diff --git a/src/arch/x86/bios/acpi.hh b/src/arch/x86/bios/acpi.hh index bcc4e1962..5bbabfcf7 100644 --- a/src/arch/x86/bios/acpi.hh +++ b/src/arch/x86/bios/acpi.hh @@ -58,12 +58,12 @@ #ifndef __ARCH_X86_BIOS_ACPI_HH__ #define __ARCH_X86_BIOS_ACPI_HH__ +#include +#include + #include "base/types.hh" #include "sim/sim_object.hh" -#include -#include - class Port; class X86ACPIRSDPParams; diff --git a/src/arch/x86/bios/e820.hh b/src/arch/x86/bios/e820.hh index 0cff6cc16..184dd2072 100644 --- a/src/arch/x86/bios/e820.hh +++ b/src/arch/x86/bios/e820.hh @@ -58,13 +58,13 @@ #ifndef __ARCH_X86_BIOS_E820_HH__ #define __ARCH_X86_BIOS_E820_HH__ +#include + +#include "base/types.hh" #include "params/X86E820Entry.hh" #include "params/X86E820Table.hh" -#include "base/types.hh" #include "sim/sim_object.hh" -#include - class Port; namespace X86ISA diff --git a/src/arch/x86/bios/intelmp.cc b/src/arch/x86/bios/intelmp.cc index e526f9658..ab4f54bac 100644 --- a/src/arch/x86/bios/intelmp.cc +++ b/src/arch/x86/bios/intelmp.cc @@ -58,9 +58,9 @@ #include "arch/x86/bios/intelmp.hh" #include "arch/x86/isa_traits.hh" #include "base/misc.hh" +#include "base/types.hh" #include "mem/port.hh" #include "sim/byteswap.hh" -#include "base/types.hh" // Config entry types #include "params/X86IntelMPBaseConfigEntry.hh" diff --git a/src/arch/x86/bios/smbios.cc b/src/arch/x86/bios/smbios.cc index 1e49a875a..23ac55a6b 100644 --- a/src/arch/x86/bios/smbios.cc +++ b/src/arch/x86/bios/smbios.cc @@ -87,12 +87,12 @@ #include "arch/x86/bios/smbios.hh" #include "arch/x86/isa_traits.hh" +#include "base/types.hh" #include "mem/port.hh" #include "params/X86SMBiosBiosInformation.hh" #include "params/X86SMBiosSMBiosStructure.hh" #include "params/X86SMBiosSMBiosTable.hh" #include "sim/byteswap.hh" -#include "base/types.hh" using namespace std; diff --git a/src/arch/x86/bios/smbios.hh b/src/arch/x86/bios/smbios.hh index 688b0a6c5..d1c537651 100644 --- a/src/arch/x86/bios/smbios.hh +++ b/src/arch/x86/bios/smbios.hh @@ -91,9 +91,9 @@ #include #include +#include "base/types.hh" #include "enums/Characteristic.hh" #include "enums/ExtCharacteristic.hh" -#include "base/types.hh" #include "sim/sim_object.hh" class FunctionalPort; diff --git a/src/arch/x86/intmessage.hh b/src/arch/x86/intmessage.hh index 48f6c671b..f4a3ab9a6 100644 --- a/src/arch/x86/intmessage.hh +++ b/src/arch/x86/intmessage.hh @@ -33,10 +33,10 @@ #include "arch/x86/x86_traits.hh" #include "base/bitunion.hh" +#include "base/types.hh" #include "mem/packet.hh" #include "mem/packet_access.hh" #include "mem/request.hh" -#include "base/types.hh" namespace X86ISA { diff --git a/src/arch/x86/miscregfile.hh b/src/arch/x86/miscregfile.hh index fad70bf78..74dcbcbea 100644 --- a/src/arch/x86/miscregfile.hh +++ b/src/arch/x86/miscregfile.hh @@ -88,13 +88,13 @@ #ifndef __ARCH_X86_MISCREGFILE_HH__ #define __ARCH_X86_MISCREGFILE_HH__ +#include + #include "arch/x86/faults.hh" #include "arch/x86/miscregs.hh" #include "arch/x86/types.hh" #include "base/types.hh" -#include - class Checkpoint; namespace X86ISA diff --git a/src/arch/x86/pagetable.hh b/src/arch/x86/pagetable.hh index 2c359c2cf..e21978b1c 100644 --- a/src/arch/x86/pagetable.hh +++ b/src/arch/x86/pagetable.hh @@ -61,9 +61,9 @@ #include #include -#include "base/types.hh" #include "base/bitunion.hh" #include "base/misc.hh" +#include "base/types.hh" class Checkpoint; diff --git a/src/arch/x86/pagetable_walker.hh b/src/arch/x86/pagetable_walker.hh index 613832cb9..78866bb9e 100644 --- a/src/arch/x86/pagetable_walker.hh +++ b/src/arch/x86/pagetable_walker.hh @@ -62,10 +62,10 @@ #include "arch/x86/pagetable.hh" #include "arch/x86/tlb.hh" +#include "base/types.hh" #include "mem/mem_object.hh" #include "mem/packet.hh" #include "params/X86PagetableWalker.hh" -#include "base/types.hh" class ThreadContext; diff --git a/src/arch/x86/predecoder.cc b/src/arch/x86/predecoder.cc index 0ae0fd328..24276f06c 100644 --- a/src/arch/x86/predecoder.cc +++ b/src/arch/x86/predecoder.cc @@ -59,8 +59,8 @@ #include "arch/x86/predecoder.hh" #include "base/misc.hh" #include "base/trace.hh" -#include "cpu/thread_context.hh" #include "base/types.hh" +#include "cpu/thread_context.hh" namespace X86ISA { diff --git a/src/arch/x86/regfile.hh b/src/arch/x86/regfile.hh index 07561fe8a..4f285254a 100644 --- a/src/arch/x86/regfile.hh +++ b/src/arch/x86/regfile.hh @@ -58,6 +58,8 @@ #ifndef __ARCH_X86_REGFILE_HH__ #define __ARCH_X86_REGFILE_HH__ +#include + #include "arch/x86/floatregfile.hh" #include "arch/x86/intregfile.hh" #include "arch/x86/isa_traits.hh" @@ -65,8 +67,6 @@ #include "arch/x86/types.hh" #include "base/types.hh" -#include - class Checkpoint; class EventManager; diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh index c34411a2f..9290dc024 100644 --- a/src/arch/x86/utility.hh +++ b/src/arch/x86/utility.hh @@ -61,9 +61,9 @@ #include "arch/x86/types.hh" #include "base/hashmap.hh" #include "base/misc.hh" +#include "base/types.hh" #include "config/full_system.hh" #include "cpu/thread_context.hh" -#include "base/types.hh" class ThreadContext; diff --git a/src/arch/x86/x86_traits.hh b/src/arch/x86/x86_traits.hh index 381695c40..8b50bdf9b 100644 --- a/src/arch/x86/x86_traits.hh +++ b/src/arch/x86/x86_traits.hh @@ -58,7 +58,7 @@ #ifndef __ARCH_X86_X86TRAITS_HH__ #define __ARCH_X86_X86TRAITS_HH__ -#include +#include #include "base/types.hh" diff --git a/src/base/cp_annotate.hh b/src/base/cp_annotate.hh index 811f95f54..05d8129d0 100644 --- a/src/base/cp_annotate.hh +++ b/src/base/cp_annotate.hh @@ -31,19 +31,20 @@ #ifndef __BASE__CP_ANNOTATE_HH__ #define __BASE__CP_ANNOTATE_HH__ -#include "base/loader/symtab.hh" -#include "config/cp_annotate.hh" -#include "base/types.hh" -#include "sim/serialize.hh" -#include "sim/startup.hh" -#include "sim/system.hh" - #include #include #include #include + #include "base/hashmap.hh" +#include "base/loader/symtab.hh" #include "base/trace.hh" +#include "base/types.hh" +#include "config/cp_annotate.hh" +#include "sim/serialize.hh" +#include "sim/startup.hh" +#include "sim/system.hh" + #if CP_ANNOTATE #include "params/CPA.hh" #endif diff --git a/src/base/crc.cc b/src/base/crc.cc index eb1f4b641..d4b0de70e 100644 --- a/src/base/crc.cc +++ b/src/base/crc.cc @@ -33,8 +33,8 @@ #include -#include "base/types.hh" #include "base/crc.hh" +#include "base/types.hh" #define ETHER_CRC_POLY_LE 0xedb88320 #define ETHER_CRC_POLY_BE 0x04c11db6 diff --git a/src/base/inet.cc b/src/base/inet.cc index 84379b135..898a189ef 100644 --- a/src/base/inet.cc +++ b/src/base/inet.cc @@ -32,8 +32,8 @@ #include #include "base/cprintf.hh" -#include "base/types.hh" #include "base/inet.hh" +#include "base/types.hh" using namespace std; namespace Net { diff --git a/src/base/inet.hh b/src/base/inet.hh index 61d432036..ef9a7d81c 100644 --- a/src/base/inet.hh +++ b/src/base/inet.hh @@ -38,8 +38,8 @@ #include #include "base/range.hh" -#include "dev/etherpkt.hh" #include "base/types.hh" +#include "dev/etherpkt.hh" #include "dnet/os.h" #include "dnet/eth.h" diff --git a/src/base/intmath.hh b/src/base/intmath.hh index 139f6bf15..a2960e750 100644 --- a/src/base/intmath.hh +++ b/src/base/intmath.hh @@ -28,10 +28,10 @@ * Authors: Nathan Binkert */ -#ifndef __INTMATH_HH__ -#define __INTMATH_HH__ +#ifndef __BASE_INTMATH_HH__ +#define __BASE_INTMATH_HH__ -#include +#include #include "base/types.hh" @@ -229,4 +229,4 @@ hex2Int(char c) return 0; } -#endif // __INTMATH_HH__ +#endif // __BASE_INTMATH_HH__ diff --git a/src/base/misc.cc b/src/base/misc.cc index 55c324aaa..65cb13356 100644 --- a/src/base/misc.cc +++ b/src/base/misc.cc @@ -38,8 +38,8 @@ #include "base/misc.hh" #include "base/output.hh" #include "base/trace.hh" -#include "base/varargs.hh" #include "base/types.hh" +#include "base/varargs.hh" #include "sim/core.hh" using namespace std; diff --git a/src/base/pollevent.cc b/src/base/pollevent.cc index 0f237566a..7dcaa094d 100644 --- a/src/base/pollevent.cc +++ b/src/base/pollevent.cc @@ -38,10 +38,10 @@ #include #include -#include "sim/async.hh" -#include "base/types.hh" #include "base/misc.hh" #include "base/pollevent.hh" +#include "base/types.hh" +#include "sim/async.hh" #include "sim/core.hh" #include "sim/serialize.hh" diff --git a/src/base/res_list.hh b/src/base/res_list.hh index 024b56982..fd2204321 100644 --- a/src/base/res_list.hh +++ b/src/base/res_list.hh @@ -32,8 +32,9 @@ #ifndef __RES_LIST_HH__ #define __RES_LIST_HH__ +#include + #include "base/cprintf.hh" -#include #define DEBUG_REMOVE 0 diff --git a/src/base/statistics.hh b/src/base/statistics.hh index 243d56c3a..52c0111d8 100644 --- a/src/base/statistics.hh +++ b/src/base/statistics.hh @@ -63,10 +63,10 @@ #include "base/cprintf.hh" #include "base/intmath.hh" #include "base/refcnt.hh" -#include "base/str.hh" #include "base/stats/info.hh" #include "base/stats/types.hh" #include "base/stats/visit.hh" +#include "base/str.hh" #include "base/types.hh" class Callback; diff --git a/src/base/stats/mysql.cc b/src/base/stats/mysql.cc index 91bea4540..1e3ab0f84 100644 --- a/src/base/stats/mysql.cc +++ b/src/base/stats/mysql.cc @@ -42,8 +42,8 @@ #include "base/stats/mysql_run.hh" #include "base/stats/types.hh" #include "base/str.hh" -#include "base/userinfo.hh" #include "base/types.hh" +#include "base/userinfo.hh" using namespace std; diff --git a/src/base/stats/output.cc b/src/base/stats/output.cc index f3a549b44..ae2c9db5e 100644 --- a/src/base/stats/output.cc +++ b/src/base/stats/output.cc @@ -32,8 +32,8 @@ #include "base/statistics.hh" #include "base/stats/output.hh" -#include "sim/eventq.hh" #include "base/types.hh" +#include "sim/eventq.hh" using namespace std; diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh index a1bbe3735..aa0831dfd 100644 --- a/src/cpu/exetrace.hh +++ b/src/cpu/exetrace.hh @@ -29,14 +29,14 @@ * Nathan Binkert */ -#ifndef __EXETRACE_HH__ -#define __EXETRACE_HH__ +#ifndef __CPU_EXETRACE_HH__ +#define __CPU_EXETRACE_HH__ #include "base/trace.hh" -#include "cpu/static_inst.hh" #include "base/types.hh" -#include "sim/insttracer.hh" +#include "cpu/static_inst.hh" #include "params/ExeTracer.hh" +#include "sim/insttracer.hh" class ThreadContext; @@ -88,4 +88,4 @@ class ExeTracer : public InstTracer /* namespace Trace */ } -#endif // __EXETRACE_HH__ +#endif // __CPU_EXETRACE_HH__ diff --git a/src/cpu/inorder/comm.hh b/src/cpu/inorder/comm.hh index 1a7fc9050..f1b3cacac 100644 --- a/src/cpu/inorder/comm.hh +++ b/src/cpu/inorder/comm.hh @@ -36,10 +36,10 @@ #include "arch/faults.hh" #include "arch/isa_traits.hh" +#include "base/types.hh" #include "cpu/inorder/inorder_dyn_inst.hh" #include "cpu/inorder/pipeline_traits.hh" #include "cpu/inst_seq.hh" -#include "base/types.hh" /** Struct that defines the information passed from in between stages */ /** This information mainly goes forward through the pipeline. */ diff --git a/src/cpu/inorder/inorder_trace.hh b/src/cpu/inorder/inorder_trace.hh index eb1287370..ccc868f15 100644 --- a/src/cpu/inorder/inorder_trace.hh +++ b/src/cpu/inorder/inorder_trace.hh @@ -29,19 +29,18 @@ * Authors: Korey Sewell */ -#ifndef __INORDERTRACE_HH__ -#define __INORDERTRACE_HH__ +#ifndef __CPU_INORDER_INORDER_TRACE_HH__ +#define __CPU_INORDER_INORDER_TRACE_HH__ #include "base/trace.hh" -#include "cpu/static_inst.hh" #include "base/types.hh" -#include "sim/insttracer.hh" -#include "params/InOrderTrace.hh" #include "cpu/exetrace.hh" +#include "cpu/static_inst.hh" +#include "params/InOrderTrace.hh" +#include "sim/insttracer.hh" class ThreadContext; - namespace Trace { class InOrderTraceRecord : public ExeTracerRecord @@ -95,4 +94,4 @@ class InOrderTrace : public InstTracer /* namespace Trace */ } -#endif // __EXETRACE_HH__ +#endif // __CPU_INORDER_INORDER_TRACE_HH__ diff --git a/src/cpu/inteltrace.hh b/src/cpu/inteltrace.hh index 56fafe93a..c4ace4f4b 100644 --- a/src/cpu/inteltrace.hh +++ b/src/cpu/inteltrace.hh @@ -29,18 +29,17 @@ * Nathan Binkert */ -#ifndef __INTELTRACE_HH__ -#define __INTELTRACE_HH__ +#ifndef __CPU_INTELTRACE_HH__ +#define __CPU_INTELTRACE_HH__ #include "base/trace.hh" +#include "base/types.hh" #include "cpu/static_inst.hh" #include "params/IntelTrace.hh" -#include "base/types.hh" #include "sim/insttracer.hh" class ThreadContext; - namespace Trace { class IntelTraceRecord : public InstRecord @@ -85,4 +84,4 @@ class IntelTrace : public InstTracer /* namespace Trace */ } -#endif // __EXETRACE_HH__ +#endif // __CPU_INTELTRACE_HH__ diff --git a/src/cpu/legiontrace.hh b/src/cpu/legiontrace.hh index 19a996ed3..829941d4b 100644 --- a/src/cpu/legiontrace.hh +++ b/src/cpu/legiontrace.hh @@ -29,13 +29,13 @@ * Nathan Binkert */ -#ifndef __LEGIONTRACE_HH__ -#define __LEGIONTRACE_HH__ +#ifndef __CPU_LEGIONTRACE_HH__ +#define __CPU_LEGIONTRACE_HH__ #include "base/trace.hh" +#include "base/types.hh" #include "cpu/static_inst.hh" #include "params/LegionTrace.hh" -#include "base/types.hh" #include "sim/insttracer.hh" class ThreadContext; @@ -78,4 +78,4 @@ class LegionTrace : public InstTracer /* namespace Trace */ } -#endif // __LEGIONTRACE_HH__ +#endif // __CPU_LEGIONTRACE_HH__ diff --git a/src/cpu/nativetrace.hh b/src/cpu/nativetrace.hh index 12d96e0ae..f137e66ee 100644 --- a/src/cpu/nativetrace.hh +++ b/src/cpu/nativetrace.hh @@ -29,19 +29,18 @@ * Nathan Binkert */ -#ifndef __NATIVETRACE_HH__ -#define __NATIVETRACE_HH__ +#ifndef __CPU_NATIVETRACE_HH__ +#define __CPU_NATIVETRACE_HH__ +#include "arch/x86/floatregs.hh" +#include "arch/x86/intregs.hh" #include "base/trace.hh" -#include "cpu/static_inst.hh" #include "base/types.hh" +#include "cpu/static_inst.hh" #include "sim/insttracer.hh" -#include "arch/x86/intregs.hh" -#include "arch/x86/floatregs.hh" class ThreadContext; - namespace Trace { class NativeTrace; @@ -213,4 +212,4 @@ class NativeTrace : public InstTracer /* namespace Trace */ } -#endif // __EXETRACE_HH__ +#endif // __CPU_NATIVETRACE_HH__ diff --git a/src/cpu/o3/2bit_local_pred.hh b/src/cpu/o3/2bit_local_pred.hh index 7669c6b97..8b7bb8463 100644 --- a/src/cpu/o3/2bit_local_pred.hh +++ b/src/cpu/o3/2bit_local_pred.hh @@ -31,11 +31,11 @@ #ifndef __CPU_O3_2BIT_LOCAL_PRED_HH__ #define __CPU_O3_2BIT_LOCAL_PRED_HH__ -#include "cpu/o3/sat_counter.hh" -#include "base/types.hh" - #include +#include "base/types.hh" +#include "cpu/o3/sat_counter.hh" + /** * Implements a local predictor that uses the PC to index into a table of * counters. Note that any time a pointer to the bp_history is given, it diff --git a/src/cpu/o3/bpred_unit.hh b/src/cpu/o3/bpred_unit.hh index 15d34316e..4875c03d8 100644 --- a/src/cpu/o3/bpred_unit.hh +++ b/src/cpu/o3/bpred_unit.hh @@ -31,18 +31,16 @@ #ifndef __CPU_O3_BPRED_UNIT_HH__ #define __CPU_O3_BPRED_UNIT_HH__ +#include + #include "base/statistics.hh" +#include "base/types.hh" #include "cpu/inst_seq.hh" - #include "cpu/o3/2bit_local_pred.hh" #include "cpu/o3/btb.hh" #include "cpu/o3/ras.hh" #include "cpu/o3/tournament_pred.hh" -#include "base/types.hh" - -#include - class DerivO3CPUParams; /** diff --git a/src/cpu/o3/comm.hh b/src/cpu/o3/comm.hh index a486f340d..23b836f73 100644 --- a/src/cpu/o3/comm.hh +++ b/src/cpu/o3/comm.hh @@ -33,9 +33,9 @@ #include -#include "sim/faults.hh" -#include "cpu/inst_seq.hh" #include "base/types.hh" +#include "cpu/inst_seq.hh" +#include "sim/faults.hh" // Typedef for physical register index type. Although the Impl would be the // most likely location for this, there are a few classes that need this diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 96a4aebef..4d8033a8c 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -32,17 +32,17 @@ #include #include -#include "config/use_checker.hh" - #include "arch/isa_traits.hh" #include "arch/utility.hh" +#include "base/types.hh" +#include "config/use_checker.hh" #include "cpu/checker/cpu.hh" #include "cpu/exetrace.hh" #include "cpu/o3/fetch.hh" #include "mem/packet.hh" #include "mem/request.hh" +#include "params/DerivO3CPU.hh" #include "sim/byteswap.hh" -#include "base/types.hh" #include "sim/core.hh" #if FULL_SYSTEM @@ -51,8 +51,6 @@ #include "sim/system.hh" #endif // FULL_SYSTEM -#include "params/DerivO3CPU.hh" - template void DefaultFetch::IcachePort::setPeer(Port *port) diff --git a/src/cpu/o3/inst_queue.hh b/src/cpu/o3/inst_queue.hh index 5537a57e7..0b814ccb4 100644 --- a/src/cpu/o3/inst_queue.hh +++ b/src/cpu/o3/inst_queue.hh @@ -38,11 +38,11 @@ #include "base/statistics.hh" #include "base/timebuf.hh" +#include "base/types.hh" #include "cpu/inst_seq.hh" #include "cpu/o3/dep_graph.hh" #include "cpu/op_class.hh" #include "sim/eventq.hh" -#include "base/types.hh" class DerivO3CPUParams; class FUPool; diff --git a/src/cpu/o3/ras.hh b/src/cpu/o3/ras.hh index e9a52fd37..a36faf79a 100644 --- a/src/cpu/o3/ras.hh +++ b/src/cpu/o3/ras.hh @@ -31,9 +31,10 @@ #ifndef __CPU_O3_RAS_HH__ #define __CPU_O3_RAS_HH__ -#include "base/types.hh" #include +#include "base/types.hh" + /** Return address stack class, implements a simple RAS. */ class ReturnAddrStack { diff --git a/src/cpu/o3/store_set.hh b/src/cpu/o3/store_set.hh index 88f5e0d07..57cd2a197 100644 --- a/src/cpu/o3/store_set.hh +++ b/src/cpu/o3/store_set.hh @@ -36,8 +36,8 @@ #include #include -#include "cpu/inst_seq.hh" #include "base/types.hh" +#include "cpu/inst_seq.hh" struct ltseqnum { bool operator()(const InstSeqNum &lhs, const InstSeqNum &rhs) const diff --git a/src/cpu/o3/tournament_pred.hh b/src/cpu/o3/tournament_pred.hh index 31e539628..96bd43ed6 100644 --- a/src/cpu/o3/tournament_pred.hh +++ b/src/cpu/o3/tournament_pred.hh @@ -31,10 +31,11 @@ #ifndef __CPU_O3_TOURNAMENT_PRED_HH__ #define __CPU_O3_TOURNAMENT_PRED_HH__ -#include "cpu/o3/sat_counter.hh" -#include "base/types.hh" #include +#include "base/types.hh" +#include "cpu/o3/sat_counter.hh" + /** * Implements a tournament branch predictor, hopefully identical to the one * used in the 21264. It has a local predictor, which uses a local history diff --git a/src/cpu/ozone/ea_list.hh b/src/cpu/ozone/ea_list.hh index eadd577a4..bf05884b5 100644 --- a/src/cpu/ozone/ea_list.hh +++ b/src/cpu/ozone/ea_list.hh @@ -35,8 +35,8 @@ #include #include -#include "cpu/inst_seq.hh" #include "base/types.hh" +#include "cpu/inst_seq.hh" /** * Simple class to hold onto a list of pairs, each pair having a memory diff --git a/src/cpu/ozone/inst_queue.hh b/src/cpu/ozone/inst_queue.hh index 8235760b4..5af916fb5 100644 --- a/src/cpu/ozone/inst_queue.hh +++ b/src/cpu/ozone/inst_queue.hh @@ -38,8 +38,8 @@ #include "base/statistics.hh" #include "base/timebuf.hh" -#include "cpu/inst_seq.hh" #include "base/types.hh" +#include "cpu/inst_seq.hh" class FUPool; class MemInterface; diff --git a/src/cpu/ozone/null_predictor.hh b/src/cpu/ozone/null_predictor.hh index e930ca7d4..68bb7cd52 100644 --- a/src/cpu/ozone/null_predictor.hh +++ b/src/cpu/ozone/null_predictor.hh @@ -31,8 +31,8 @@ #ifndef __CPU_OZONE_NULL_PREDICTOR_HH__ #define __CPU_OZONE_NULL_PREDICTOR_HH__ -#include "cpu/inst_seq.hh" #include "base/types.hh" +#include "cpu/inst_seq.hh" template class NullPredictor diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index ef9f2e712..5988f0e7e 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -28,10 +28,10 @@ * Authors: Steve Reinhardt */ -#include "arch/utility.hh" #include "arch/faults.hh" -#include "base/cprintf.hh" +#include "arch/utility.hh" #include "base/cp_annotate.hh" +#include "base/cprintf.hh" #include "base/inifile.hh" #include "base/loader/symtab.hh" #include "base/misc.hh" @@ -39,6 +39,7 @@ #include "base/range.hh" #include "base/stats/events.hh" #include "base/trace.hh" +#include "base/types.hh" #include "cpu/base.hh" #include "cpu/exetrace.hh" #include "cpu/profile.hh" @@ -49,9 +50,9 @@ #include "cpu/thread_context.hh" #include "mem/packet.hh" #include "mem/request.hh" +#include "params/BaseSimpleCPU.hh" #include "sim/byteswap.hh" #include "sim/debug.hh" -#include "base/types.hh" #include "sim/sim_events.hh" #include "sim/sim_object.hh" #include "sim/stats.hh" @@ -67,8 +68,6 @@ #include "mem/mem_object.hh" #endif // FULL_SYSTEM -#include "params/BaseSimpleCPU.hh" - using namespace std; using namespace TheISA; diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 7348a8576..35f74a67e 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -35,13 +35,13 @@ #include "arch/isa_traits.hh" #include "arch/regfile.hh" #include "arch/tlb.hh" +#include "base/types.hh" #include "config/full_system.hh" #include "cpu/thread_context.hh" #include "cpu/thread_state.hh" #include "mem/request.hh" #include "sim/byteswap.hh" #include "sim/eventq.hh" -#include "base/types.hh" #include "sim/serialize.hh" class BaseCPU; diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index 58a6b7986..b1298e0e9 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -36,14 +36,14 @@ #include "arch/isa_traits.hh" #include "arch/utility.hh" -#include "sim/faults.hh" #include "base/bitfield.hh" #include "base/hashmap.hh" #include "base/misc.hh" #include "base/refcnt.hh" +#include "base/types.hh" #include "cpu/op_class.hh" #include "sim/faults.hh" -#include "base/types.hh" +#include "sim/faults.hh" // forward declarations struct AlphaSimpleImpl; diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh index 08b9b6e0c..51ca3cca6 100644 --- a/src/cpu/thread_context.hh +++ b/src/cpu/thread_context.hh @@ -33,12 +33,12 @@ #include "arch/regfile.hh" #include "arch/types.hh" +#include "base/types.hh" #include "config/full_system.hh" #include "mem/request.hh" +#include "sim/byteswap.hh" #include "sim/faults.hh" -#include "base/types.hh" #include "sim/serialize.hh" -#include "sim/byteswap.hh" // @todo: Figure out a more architecture independent way to obtain the ITB and // DTB pointers. diff --git a/src/dev/alpha/backdoor.hh b/src/dev/alpha/backdoor.hh index 6fae27d31..2acaba9a3 100644 --- a/src/dev/alpha/backdoor.hh +++ b/src/dev/alpha/backdoor.hh @@ -36,10 +36,10 @@ #define __DEV_ALPHA_BACKDOOR_HH__ #include "base/range.hh" +#include "base/types.hh" #include "dev/alpha/access.h" #include "dev/io_device.hh" #include "params/AlphaBackdoor.hh" -#include "base/types.hh" #include "sim/sim_object.hh" class BaseCPU; diff --git a/src/dev/etherlink.hh b/src/dev/etherlink.hh index 519e37152..c47948f58 100644 --- a/src/dev/etherlink.hh +++ b/src/dev/etherlink.hh @@ -35,14 +35,14 @@ #ifndef __DEV_ETHERLINK_HH__ #define __DEV_ETHERLINK_HH__ -#include "dev/etherobject.hh" +#include "base/types.hh" #include "dev/etherint.hh" +#include "dev/etherobject.hh" #include "dev/etherpkt.hh" #include "params/EtherLink.hh" +#include "params/EtherLink.hh" #include "sim/eventq.hh" -#include "base/types.hh" #include "sim/sim_object.hh" -#include "params/EtherLink.hh" class EtherDump; class Checkpoint; diff --git a/src/dev/etherpkt.hh b/src/dev/etherpkt.hh index 4193a7302..b7d33887b 100644 --- a/src/dev/etherpkt.hh +++ b/src/dev/etherpkt.hh @@ -36,9 +36,9 @@ #ifndef __ETHERPKT_HH__ #define __ETHERPKT_HH__ +#include #include #include -#include #include "base/refcnt.hh" #include "base/types.hh" diff --git a/src/dev/intel_8254_timer.hh b/src/dev/intel_8254_timer.hh index 69d80d81a..30ddc7bca 100644 --- a/src/dev/intel_8254_timer.hh +++ b/src/dev/intel_8254_timer.hh @@ -37,8 +37,8 @@ #include #include "base/bitunion.hh" -#include "sim/eventq.hh" #include "base/types.hh" +#include "sim/eventq.hh" #include "sim/serialize.hh" /** Programmable Interval Timer (Intel 8254) */ diff --git a/src/dev/mips/backdoor.hh b/src/dev/mips/backdoor.hh index f8995b72b..70b02c8ed 100755 --- a/src/dev/mips/backdoor.hh +++ b/src/dev/mips/backdoor.hh @@ -36,10 +36,10 @@ #define __DEV_MIPS_BACKDOOR_HH__ #include "base/range.hh" -#include "dev/mips/access.h" +#include "base/types.hh" #include "dev/io_device.hh" +#include "dev/mips/access.h" #include "params/MipsBackdoor.hh" -#include "base/types.hh" #include "sim/sim_object.hh" class BaseCPU; diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc index ecaebb663..912ca7f0f 100644 --- a/src/dev/ns_gige.cc +++ b/src/dev/ns_gige.cc @@ -38,6 +38,7 @@ #include "base/debug.hh" #include "base/inet.hh" +#include "base/types.hh" #include "cpu/thread_context.hh" #include "dev/etherlink.hh" #include "dev/ns_gige.hh" @@ -45,7 +46,6 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" #include "params/NSGigE.hh" -#include "base/types.hh" #include "sim/system.hh" const char *NsRxStateStrings[] = diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc index ce9ac5984..ae01e2930 100644 --- a/src/dev/sinic.cc +++ b/src/dev/sinic.cc @@ -35,14 +35,14 @@ #include "arch/vtophys.hh" #include "base/debug.hh" #include "base/inet.hh" -#include "cpu/thread_context.hh" +#include "base/types.hh" #include "cpu/intr_control.hh" +#include "cpu/thread_context.hh" #include "dev/etherlink.hh" #include "dev/sinic.hh" #include "mem/packet.hh" #include "mem/packet_access.hh" #include "sim/eventq.hh" -#include "base/types.hh" #include "sim/stats.hh" using namespace std; diff --git a/src/dev/x86/intdev.hh b/src/dev/x86/intdev.hh index c2c8057b9..8f5f8707e 100644 --- a/src/dev/x86/intdev.hh +++ b/src/dev/x86/intdev.hh @@ -31,7 +31,7 @@ #ifndef __DEV_X86_INTDEV_HH__ #define __DEV_X86_INTDEV_HH__ -#include +#include #include #include "arch/x86/x86_traits.hh" diff --git a/src/dev/x86/south_bridge.cc b/src/dev/x86/south_bridge.cc index c456f478d..dbb1ef1be 100644 --- a/src/dev/x86/south_bridge.cc +++ b/src/dev/x86/south_bridge.cc @@ -28,7 +28,7 @@ * Authors: Gabe Black */ -#include +#include #include "dev/x86/pc.hh" #include "dev/x86/south_bridge.hh" diff --git a/src/kern/tru64/dump_mbuf.cc b/src/kern/tru64/dump_mbuf.cc index 2cc0d15fd..517aad6fa 100644 --- a/src/kern/tru64/dump_mbuf.cc +++ b/src/kern/tru64/dump_mbuf.cc @@ -31,16 +31,16 @@ #include #include +#include "arch/isa_traits.hh" +#include "arch/vtophys.hh" #include "base/cprintf.hh" -#include "base/trace.hh" #include "base/loader/symtab.hh" +#include "base/trace.hh" +#include "base/types.hh" #include "cpu/thread_context.hh" #include "kern/tru64/mbuf.hh" -#include "base/types.hh" -#include "sim/system.hh" #include "sim/arguments.hh" -#include "arch/isa_traits.hh" -#include "arch/vtophys.hh" +#include "sim/system.hh" using namespace TheISA; diff --git a/src/kern/tru64/mbuf.hh b/src/kern/tru64/mbuf.hh index b1b86ef47..d02cba051 100644 --- a/src/kern/tru64/mbuf.hh +++ b/src/kern/tru64/mbuf.hh @@ -31,8 +31,8 @@ #ifndef __MBUF_HH__ #define __MBUF_HH__ -#include "base/types.hh" #include "arch/isa_traits.hh" +#include "base/types.hh" namespace tru64 { diff --git a/src/mem/bus.hh b/src/mem/bus.hh index a55e37e59..4de42b538 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -41,16 +41,16 @@ #include #include -#include "base/range.hh" #include "base/hashmap.hh" +#include "base/range.hh" #include "base/range_map.hh" #include "base/types.hh" #include "mem/mem_object.hh" #include "mem/packet.hh" #include "mem/port.hh" #include "mem/request.hh" -#include "sim/eventq.hh" #include "params/Bus.hh" +#include "sim/eventq.hh" class Bus : public MemObject { diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index cf738a340..0940893bc 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -37,18 +37,15 @@ * Cache definitions. */ -#include "base/types.hh" #include "base/fast_alloc.hh" #include "base/misc.hh" #include "base/range.hh" - -#include "mem/cache/cache.hh" +#include "base/types.hh" #include "mem/cache/blk.hh" +#include "mem/cache/cache.hh" #include "mem/cache/mshr.hh" #include "mem/cache/prefetch/base.hh" - -#include "sim/sim_exit.hh" // for SimExitEvent - +#include "sim/sim_exit.hh" template Cache::Cache(const Params *p, TagStore *tags, BasePrefetcher *pf) diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc index ee267feb8..726253c62 100644 --- a/src/mem/cache/mshr.cc +++ b/src/mem/cache/mshr.cc @@ -34,16 +34,16 @@ * Miss Status and Handling Register (MSHR) definitions. */ -#include +#include +#include #include #include -#include -#include "mem/cache/mshr.hh" -#include "sim/core.hh" // for curTick -#include "base/types.hh" #include "base/misc.hh" +#include "base/types.hh" #include "mem/cache/cache.hh" +#include "mem/cache/mshr.hh" +#include "sim/core.hh" using namespace std; diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index f92d4cb37..0e0121f67 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -33,13 +33,12 @@ * Definitions a fully associative LRU tagstore. */ +#include #include -#include - -#include "mem/cache/tags/fa_lru.hh" #include "base/intmath.hh" #include "base/misc.hh" +#include "mem/cache/tags/fa_lru.hh" using namespace std; diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh index 4eab10c49..23d09d709 100644 --- a/src/mem/cache/tags/fa_lru.hh +++ b/src/mem/cache/tags/fa_lru.hh @@ -33,15 +33,15 @@ * Declaration of a fully associative LRU tag store. */ -#ifndef __FA_LRU_HH__ -#define __FA_LRU_HH__ +#ifndef __MEM_CACHE_TAGS_FA_LRU_HH__ +#define __MEM_CACHE_TAGS_FA_LRU_HH__ #include -#include "mem/cache/blk.hh" -#include "mem/packet.hh" #include "base/hashmap.hh" +#include "mem/cache/blk.hh" #include "mem/cache/tags/base.hh" +#include "mem/packet.hh" /** * A fully associative cache block. @@ -281,4 +281,4 @@ public: } }; -#endif +#endif // __MEM_CACHE_TAGS_FA_LRU_HH__ diff --git a/src/mem/cache/tags/iic_repl/gen.cc b/src/mem/cache/tags/iic_repl/gen.cc index 1c19420da..1008c3a7c 100644 --- a/src/mem/cache/tags/iic_repl/gen.cc +++ b/src/mem/cache/tags/iic_repl/gen.cc @@ -37,10 +37,10 @@ #include #include "base/misc.hh" +#include "base/types.hh" #include "mem/cache/tags/iic.hh" #include "mem/cache/tags/iic_repl/gen.hh" #include "params/GenRepl.hh" -#include "base/types.hh" using namespace std; diff --git a/src/mem/cache/tags/iic_repl/repl.hh b/src/mem/cache/tags/iic_repl/repl.hh index 91a4cc309..c792e3350 100644 --- a/src/mem/cache/tags/iic_repl/repl.hh +++ b/src/mem/cache/tags/iic_repl/repl.hh @@ -41,11 +41,10 @@ #include #include -#include "cpu/smt.hh" #include "base/types.hh" +#include "cpu/smt.hh" #include "sim/sim_object.hh" - class IIC; /** diff --git a/src/mem/cache/tags/lru.hh b/src/mem/cache/tags/lru.hh index 7b6e95e84..466095ec9 100644 --- a/src/mem/cache/tags/lru.hh +++ b/src/mem/cache/tags/lru.hh @@ -33,16 +33,16 @@ * Declaration of a LRU tag store. */ -#ifndef __LRU_HH__ -#define __LRU_HH__ +#ifndef __MEM_CACHE_TAGS_LRU_HH__ +#define __MEM_CACHE_TAGS_LRU_HH__ +#include #include #include -#include "mem/cache/blk.hh" // base class -#include "mem/packet.hh" // for inlined functions -#include +#include "mem/cache/blk.hh" #include "mem/cache/tags/base.hh" +#include "mem/packet.hh" class BaseCache; @@ -261,4 +261,4 @@ public: virtual void cleanupRefs(); }; -#endif +#endif // __MEM_CACHE_TAGS_LRU_HH__ diff --git a/src/mem/gems_common/util.cc b/src/mem/gems_common/util.cc index d7b0e7853..a64da15a6 100644 --- a/src/mem/gems_common/util.cc +++ b/src/mem/gems_common/util.cc @@ -30,7 +30,8 @@ * $Id$ */ -#include "assert.h" +#include + #include "mem/gems_common/util.hh" // Split a string into a head and tail strings on the specified diff --git a/src/mem/packet.hh b/src/mem/packet.hh index 14c6c40a4..6e804b726 100644 --- a/src/mem/packet.hh +++ b/src/mem/packet.hh @@ -48,11 +48,10 @@ #include "base/flags.hh" #include "base/misc.hh" #include "base/printable.hh" -#include "mem/request.hh" #include "base/types.hh" +#include "mem/request.hh" #include "sim/core.hh" - struct Packet; typedef Packet *PacketPtr; typedef uint8_t* PacketDataPtr; diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh index 461b07a69..3ce720ad4 100644 --- a/src/mem/page_table.hh +++ b/src/mem/page_table.hh @@ -33,17 +33,17 @@ * Declaration of a non-full system Page Table. */ -#ifndef __PAGE_TABLE__ -#define __PAGE_TABLE__ +#ifndef __MEM_PAGE_TABLE_HH__ +#define __MEM_PAGE_TABLE_HH__ #include -#include "sim/faults.hh" #include "arch/isa_traits.hh" #include "arch/tlb.hh" #include "base/hashmap.hh" -#include "mem/request.hh" #include "base/types.hh" +#include "mem/request.hh" +#include "sim/faults.hh" #include "sim/serialize.hh" class Process; @@ -133,4 +133,4 @@ class PageTable void unserialize(Checkpoint *cp, const std::string §ion); }; -#endif +#endif // __MEM_PAGE_TABLE_HH__ diff --git a/src/mem/physical.cc b/src/mem/physical.cc index 56849b12d..a49c12a5c 100644 --- a/src/mem/physical.cc +++ b/src/mem/physical.cc @@ -42,11 +42,11 @@ #include "arch/isa_traits.hh" #include "base/misc.hh" #include "base/random.hh" +#include "base/types.hh" #include "config/full_system.hh" #include "mem/packet_access.hh" #include "mem/physical.hh" #include "sim/eventq.hh" -#include "base/types.hh" using namespace std; using namespace TheISA; diff --git a/src/mem/ruby/common/Debug.hh b/src/mem/ruby/common/Debug.hh index 8548e9772..ad88431ef 100644 --- a/src/mem/ruby/common/Debug.hh +++ b/src/mem/ruby/common/Debug.hh @@ -31,13 +31,14 @@ * $Id$ */ -#ifndef DEBUG_H -#define DEBUG_H +#ifndef __MEM_RUBY_DEBUG_HH__ +#define __MEM_RUBY_DEBUG_HH__ #include #include #include "config/ruby_debug.hh" +#include "mem/ruby/common/Global.hh" extern std::ostream * debug_cout_ptr; @@ -302,5 +303,5 @@ const bool ASSERT_FLAG = true; }\ } -#endif //DEBUG_H +#endif // __MEM_RUBY_DEBUG_HH__ diff --git a/src/mem/ruby/common/Global.hh b/src/mem/ruby/common/Global.hh index de2d06e0e..2f42aabcb 100644 --- a/src/mem/ruby/common/Global.hh +++ b/src/mem/ruby/common/Global.hh @@ -32,8 +32,8 @@ * * */ -#ifndef GLOBAL_H -#define GLOBAL_H +#ifndef __MEM_RUBY_GLOBAL_HH__ +#define __MEM_RUBY_GLOBAL_HH__ #ifdef SINGLE_LEVEL_CACHE const bool TWO_LEVEL_CACHE = false; @@ -105,5 +105,5 @@ extern inline int max_tokens() } -#endif //GLOBAL_H +#endif // __MEM_RUBY_GLOBAL_HH__ diff --git a/src/mem/ruby/network/orion/power_ll.cc b/src/mem/ruby/network/orion/power_ll.cc index aab98cc8c..864336034 100644 --- a/src/mem/ruby/network/orion/power_ll.cc +++ b/src/mem/ruby/network/orion/power_ll.cc @@ -67,8 +67,8 @@ * SOFTWARE. *------------------------------------------------------------*/ -#include -#include +#include +#include #include "mem/ruby/network/orion/parm_technology.hh" #include "mem/ruby/network/orion/SIM_port.hh" diff --git a/src/mem/ruby/network/orion/power_utils.cc b/src/mem/ruby/network/orion/power_utils.cc index be308be88..bc69c3cc7 100644 --- a/src/mem/ruby/network/orion/power_utils.cc +++ b/src/mem/ruby/network/orion/power_utils.cc @@ -26,11 +26,12 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include +#include +#include +#include + #include "mem/ruby/network/orion/parm_technology.hh" #include "mem/ruby/network/orion/power_utils.hh" -#include -#include /* ----------- from SIM_power_util.c ------------ */ diff --git a/src/mem/rubymem.cc b/src/mem/rubymem.cc index 911d533a0..3f121f7af 100644 --- a/src/mem/rubymem.cc +++ b/src/mem/rubymem.cc @@ -28,24 +28,20 @@ * Authors: Daniel Sanchez */ +#include +#include #include "arch/isa_traits.hh" -#include "mem/rubymem.hh" -#include "sim/eventq.hh" -#include "base/types.hh" #include "base/output.hh" - -// Ruby includes -#include "mem/ruby/system/System.hh" -#include "mem/ruby/system/Sequencer.hh" -#include "mem/ruby/init.hh" +#include "base/types.hh" #include "mem/ruby/common/Debug.hh" - +#include "mem/ruby/init.hh" +#include "mem/ruby/system/Sequencer.hh" +#include "mem/ruby/system/System.hh" +#include "mem/rubymem.hh" +#include "sim/eventq.hh" #include "sim/sim_exit.hh" -#include -#include - using namespace std; using namespace TheISA; diff --git a/src/mem/slicc/slicc_global.hh b/src/mem/slicc/slicc_global.hh index 3e4f37a57..40a00c9d2 100644 --- a/src/mem/slicc/slicc_global.hh +++ b/src/mem/slicc/slicc_global.hh @@ -30,9 +30,7 @@ #ifndef SLICC_GLOBAL_H #define SLICC_GLOBAL_H -#include /* slicc needs to include this in order to use classes in - * ../common directory. - */ +#include #include "mem/gems_common/std-includes.hh" #include "mem/gems_common/Map.hh" diff --git a/src/python/swig/core.i b/src/python/swig/core.i index eefe106a4..1ff2d9fe5 100644 --- a/src/python/swig/core.i +++ b/src/python/swig/core.i @@ -36,8 +36,8 @@ #include "base/misc.hh" #include "base/socket.hh" -#include "sim/core.hh" #include "base/types.hh" +#include "sim/core.hh" #include "sim/startup.hh" extern const char *compileDate; diff --git a/src/python/swig/event.i b/src/python/swig/event.i index c09f12016..99fde2d5b 100644 --- a/src/python/swig/event.i +++ b/src/python/swig/event.i @@ -31,8 +31,8 @@ %module event %{ -#include "python/swig/pyevent.hh" #include "base/types.hh" +#include "python/swig/pyevent.hh" #include "sim/eventq.hh" #include "sim/sim_events.hh" #include "sim/sim_exit.hh" @@ -75,9 +75,10 @@ %include "stdint.i" %include "std_string.i" + %include "base/types.hh" -%include "sim/eventq.hh" %include "python/swig/pyevent.hh" +%include "sim/eventq.hh" struct CountedDrainEvent : public Event { diff --git a/src/python/swig/pyobject.hh b/src/python/swig/pyobject.hh index d11dc323c..bc3177f6f 100644 --- a/src/python/swig/pyobject.hh +++ b/src/python/swig/pyobject.hh @@ -30,8 +30,8 @@ #include -#include "cpu/base.hh" #include "base/types.hh" +#include "cpu/base.hh" #include "sim/serialize.hh" #include "sim/sim_object.hh" #include "sim/system.hh" diff --git a/src/python/swig/sim_object.i b/src/python/swig/sim_object.i index 840aea998..c98e44ec2 100644 --- a/src/python/swig/sim_object.i +++ b/src/python/swig/sim_object.i @@ -37,6 +37,7 @@ // import these files for SWIG to wrap %include "stdint.i" %include "std_string.i" + %include "base/types.hh" class BaseCPU; diff --git a/src/sim/arguments.hh b/src/sim/arguments.hh index 3cef49e5d..abc3da812 100644 --- a/src/sim/arguments.hh +++ b/src/sim/arguments.hh @@ -31,12 +31,12 @@ #ifndef __SIM_ARGUMENTS_HH__ #define __SIM_ARGUMENTS_HH__ -#include +#include #include "arch/vtophys.hh" #include "base/refcnt.hh" -#include "mem/vport.hh" #include "base/types.hh" +#include "mem/vport.hh" class ThreadContext; diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh index 219d306f0..29efdeb6f 100644 --- a/src/sim/eventq.hh +++ b/src/sim/eventq.hh @@ -47,8 +47,8 @@ #include "base/flags.hh" #include "base/misc.hh" #include "base/trace.hh" -#include "sim/serialize.hh" #include "base/types.hh" +#include "sim/serialize.hh" class EventQueue; // forward declaration diff --git a/src/sim/init.cc b/src/sim/init.cc index 2e34740fb..1e90f1568 100644 --- a/src/sim/init.cc +++ b/src/sim/init.cc @@ -39,9 +39,9 @@ #include "base/cprintf.hh" #include "base/misc.hh" +#include "base/types.hh" #include "sim/async.hh" #include "sim/core.hh" -#include "base/types.hh" #include "sim/init.hh" using namespace std; diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh index 23a0a14a6..bcab45519 100644 --- a/src/sim/insttracer.hh +++ b/src/sim/insttracer.hh @@ -34,9 +34,9 @@ #include "base/bigint.hh" #include "base/trace.hh" +#include "base/types.hh" #include "cpu/inst_seq.hh" // for InstSeqNum #include "cpu/static_inst.hh" -#include "base/types.hh" #include "sim/sim_object.hh" class ThreadContext; diff --git a/src/sim/sim_object.cc b/src/sim/sim_object.cc index 81ab00f9e..f7f539774 100644 --- a/src/sim/sim_object.cc +++ b/src/sim/sim_object.cc @@ -29,14 +29,14 @@ * Nathan Binkert */ -#include +#include #include "base/callback.hh" #include "base/inifile.hh" #include "base/match.hh" #include "base/misc.hh" -#include "base/trace.hh" #include "base/stats/events.hh" +#include "base/trace.hh" #include "base/types.hh" #include "sim/sim_object.hh" #include "sim/stats.hh" diff --git a/src/sim/simulate.cc b/src/sim/simulate.cc index 2d3b84e09..0cc603d3f 100644 --- a/src/sim/simulate.cc +++ b/src/sim/simulate.cc @@ -31,13 +31,13 @@ #include "base/misc.hh" #include "base/pollevent.hh" -#include "sim/stat_control.hh" +#include "base/types.hh" #include "sim/async.hh" #include "sim/eventq.hh" -#include "base/types.hh" #include "sim/sim_events.hh" #include "sim/sim_exit.hh" #include "sim/simulate.hh" +#include "sim/stat_control.hh" /** Simulate for num_cycles additional cycles. If num_cycles is -1 * (the default), do not limit simulation; some other event must diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh index 4831419b0..0d5bf1723 100644 --- a/src/sim/syscall_emul.hh +++ b/src/sim/syscall_emul.hh @@ -50,11 +50,11 @@ #include #include -#include "base/types.hh" #include "base/chunk_generator.hh" #include "base/intmath.hh" // for RoundUp #include "base/misc.hh" #include "base/trace.hh" +#include "base/types.hh" #include "cpu/base.hh" #include "cpu/thread_context.hh" #include "mem/translating_port.hh" diff --git a/src/unittest/rangemaptest.cc b/src/unittest/rangemaptest.cc index a6476624f..5ea117cb8 100644 --- a/src/unittest/rangemaptest.cc +++ b/src/unittest/rangemaptest.cc @@ -30,8 +30,9 @@ #include #include -#include "base/types.hh" + #include "base/range_map.hh" +#include "base/types.hh" using namespace std; diff --git a/src/unittest/rangemultimaptest.cc b/src/unittest/rangemultimaptest.cc index ec68ba35a..b5d114301 100644 --- a/src/unittest/rangemultimaptest.cc +++ b/src/unittest/rangemultimaptest.cc @@ -31,8 +31,8 @@ #include #include -#include "base/types.hh" #include "base/range_map.hh" +#include "base/types.hh" using namespace std; -- cgit v1.2.3