From 8d84f81e7041bd26320b0795800100f2aa298965 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 26 Apr 2009 02:04:32 -0700 Subject: X86, Config: Make makeX86System consider the number of CPUs, and clean up interrupt assignment. --- src/dev/x86/I82094AA.py | 1 + src/dev/x86/i82094aa.cc | 2 +- src/dev/x86/i82094aa.hh | 4 ++-- 3 files changed, 4 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/dev/x86/I82094AA.py b/src/dev/x86/I82094AA.py index 9d57beed1..5476becc6 100644 --- a/src/dev/x86/I82094AA.py +++ b/src/dev/x86/I82094AA.py @@ -34,6 +34,7 @@ from X86IntPin import X86IntSinkPin class I82094AA(BasicPioDevice): type = 'I82094AA' cxx_class = 'X86ISA::I82094AA' + apic_id = Param.Int(1, 'APIC id for this IO APIC') pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks") pio_addr = Param.Addr("Device address") int_port = Port("Port for sending and receiving interrupt messages") diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc index 2656a21f9..21332c3ae 100644 --- a/src/dev/x86/i82094aa.cc +++ b/src/dev/x86/i82094aa.cc @@ -40,7 +40,7 @@ X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p), IntDev(this), extIntPic(p->external_int_pic) { // This assumes there's only one I/O APIC in the system - id = sys->numContexts(); + id = p->apic_id; assert(id <= 0xf); arbId = id; regSel = 0; diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh index b11e2bcb1..598e218f8 100644 --- a/src/dev/x86/i82094aa.hh +++ b/src/dev/x86/i82094aa.hh @@ -103,8 +103,8 @@ class I82094AA : public PioDevice, public IntDev void getIntAddrRange(AddrRangeList &range_list) { range_list.clear(); - range_list.push_back(RangeEx(x86InterruptAddress(1, 0), - x86InterruptAddress(1, 0) + PhysAddrAPICRangeSize)); + range_list.push_back(RangeEx(x86InterruptAddress(id, 0), + x86InterruptAddress(id, 0) + PhysAddrAPICRangeSize)); } void writeReg(uint8_t offset, uint32_t value); -- cgit v1.2.3