From c9900f159e8d2fd7e32070e2cd0971caf917431d Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 15 Aug 2006 04:46:51 -0400 Subject: Fixed ALPHA_FS by moving the remnants of isa_fullsys_traits.hh into arch/alpha/pagetable.hh and fixing up some includes --HG-- extra : convert_revision : 02a47fa62b17245763314890beb68339c789d18f --- src/arch/SConscript | 1 + src/arch/alpha/ev5.cc | 3 +- src/arch/alpha/faults.hh | 2 +- src/arch/alpha/isa_traits.hh | 6 --- src/arch/alpha/pagetable.hh | 112 +++++++++++++++++++++++++++++++++++++++++++ src/arch/alpha/tlb.cc | 2 + src/arch/alpha/tlb.hh | 4 +- src/arch/alpha/vtophys.hh | 18 +++---- src/cpu/simple/base.cc | 1 + src/cpu/static_inst.hh | 2 +- src/dev/platform.cc | 1 + 11 files changed, 134 insertions(+), 18 deletions(-) create mode 100644 src/arch/alpha/pagetable.hh (limited to 'src') diff --git a/src/arch/SConscript b/src/arch/SConscript index d77060d62..59cea6211 100644 --- a/src/arch/SConscript +++ b/src/arch/SConscript @@ -47,6 +47,7 @@ sources = [] # List of headers to generate isa_switch_hdrs = Split(''' + arguments.hh faults.hh isa_traits.hh process.hh diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc index ae3b668ea..796ed07de 100644 --- a/src/arch/alpha/ev5.cc +++ b/src/arch/alpha/ev5.cc @@ -29,9 +29,10 @@ * Nathan Binkert */ -#include "arch/alpha/tlb.hh" +#include "arch/alpha/faults.hh" #include "arch/alpha/isa_traits.hh" #include "arch/alpha/osfpal.hh" +#include "arch/alpha/tlb.hh" #include "base/kgdb.h" #include "base/remote_gdb.hh" #include "base/stats/events.hh" diff --git a/src/arch/alpha/faults.hh b/src/arch/alpha/faults.hh index 11a568174..3ef4d5521 100644 --- a/src/arch/alpha/faults.hh +++ b/src/arch/alpha/faults.hh @@ -32,7 +32,7 @@ #ifndef __ALPHA_FAULTS_HH__ #define __ALPHA_FAULTS_HH__ -#include "arch/alpha/isa_traits.hh" +#include "arch/alpha/pagetable.hh" #include "sim/faults.hh" // The design of the "name" and "vect" functions is in sim/faults.hh diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh index ae4397c4c..72e38ae3e 100644 --- a/src/arch/alpha/isa_traits.hh +++ b/src/arch/alpha/isa_traits.hh @@ -35,17 +35,11 @@ namespace LittleEndianGuest {} #include "arch/alpha/types.hh" -#include "arch/alpha/isa_traits.hh" #include "config/full_system.hh" #include "sim/host.hh" class StaticInstPtr; -#if FULL_SYSTEM -#include "arch/alpha/isa_fullsys_traits.hh" -#endif - - namespace AlphaISA { diff --git a/src/arch/alpha/pagetable.hh b/src/arch/alpha/pagetable.hh new file mode 100644 index 000000000..3108c0a3e --- /dev/null +++ b/src/arch/alpha/pagetable.hh @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2002-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Nathan Binkert + * Steve Reinhardt + */ + +#ifndef __ARCH_ALPHA_PAGETABLE_H__ +#define __ARCH_ALPHA_PAGETABLE_H__ + +#include "arch/alpha/isa_traits.hh" +#include "arch/alpha/utility.hh" +#include "config/full_system.hh" + +namespace AlphaISA { + +#if FULL_SYSTEM + struct VAddr + { + static const int ImplBits = 43; + static const Addr ImplMask = (ULL(1) << ImplBits) - 1; + static const Addr UnImplMask = ~ImplMask; + + VAddr(Addr a) : addr(a) {} + Addr addr; + operator Addr() const { return addr; } + const VAddr &operator=(Addr a) { addr = a; return *this; } + + Addr vpn() const { return (addr & ImplMask) >> PageShift; } + Addr page() const { return addr & PageMask; } + Addr offset() const { return addr & PageOffset; } + + Addr level3() const + { return AlphaISA::PteAddr(addr >> PageShift); } + Addr level2() const + { return AlphaISA::PteAddr(addr >> NPtePageShift + PageShift); } + Addr level1() const + { return AlphaISA::PteAddr(addr >> 2 * NPtePageShift + PageShift); } + }; + + struct PageTableEntry + { + PageTableEntry(uint64_t e) : entry(e) {} + uint64_t entry; + operator uint64_t() const { return entry; } + const PageTableEntry &operator=(uint64_t e) { entry = e; return *this; } + const PageTableEntry &operator=(const PageTableEntry &e) + { entry = e.entry; return *this; } + + Addr _pfn() const { return (entry >> 32) & 0xffffffff; } + Addr _sw() const { return (entry >> 16) & 0xffff; } + int _rsv0() const { return (entry >> 14) & 0x3; } + bool _uwe() const { return (entry >> 13) & 0x1; } + bool _kwe() const { return (entry >> 12) & 0x1; } + int _rsv1() const { return (entry >> 10) & 0x3; } + bool _ure() const { return (entry >> 9) & 0x1; } + bool _kre() const { return (entry >> 8) & 0x1; } + bool _nomb() const { return (entry >> 7) & 0x1; } + int _gh() const { return (entry >> 5) & 0x3; } + bool _asm() const { return (entry >> 4) & 0x1; } + bool _foe() const { return (entry >> 3) & 0x1; } + bool _fow() const { return (entry >> 2) & 0x1; } + bool _for() const { return (entry >> 1) & 0x1; } + bool valid() const { return (entry >> 0) & 0x1; } + + Addr paddr() const { return _pfn() << PageShift; } + }; + + // ITB/DTB page table entry + struct PTE + { + Addr tag; // virtual page number tag + Addr ppn; // physical page number + uint8_t xre; // read permissions - VMEM_PERM_* mask + uint8_t xwe; // write permissions - VMEM_PERM_* mask + uint8_t asn; // address space number + bool asma; // address space match + bool fonr; // fault on read + bool fonw; // fault on write + bool valid; // valid page table entry + + void serialize(std::ostream &os); + void unserialize(Checkpoint *cp, const std::string §ion); + }; +#endif +}; +#endif // __ARCH_ALPHA_PAGETABLE_H__ + diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc index c6684274b..bab44c434 100644 --- a/src/arch/alpha/tlb.cc +++ b/src/arch/alpha/tlb.cc @@ -33,7 +33,9 @@ #include #include +#include "arch/alpha/pagetable.hh" #include "arch/alpha/tlb.hh" +#include "arch/alpha/faults.hh" #include "base/inifile.hh" #include "base/str.hh" #include "base/trace.hh" diff --git a/src/arch/alpha/tlb.hh b/src/arch/alpha/tlb.hh index 07d01fa5c..955460649 100644 --- a/src/arch/alpha/tlb.hh +++ b/src/arch/alpha/tlb.hh @@ -36,9 +36,11 @@ #include "arch/alpha/ev5.hh" #include "arch/alpha/isa_traits.hh" -#include "arch/alpha/faults.hh" +#include "arch/alpha/utility.hh" +#include "arch/alpha/vtophys.hh" #include "base/statistics.hh" #include "mem/request.hh" +#include "sim/faults.hh" #include "sim/sim_object.hh" class ThreadContext; diff --git a/src/arch/alpha/vtophys.hh b/src/arch/alpha/vtophys.hh index 472c694ff..32b999c37 100644 --- a/src/arch/alpha/vtophys.hh +++ b/src/arch/alpha/vtophys.hh @@ -33,22 +33,24 @@ #define __ARCH_ALPHA_VTOPHYS_H__ #include "arch/alpha/isa_traits.hh" +#include "arch/alpha/pagetable.hh" +#include "arch/alpha/utility.hh" class ThreadContext; class FunctionalPort; namespace AlphaISA { -PageTableEntry -kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, AlphaISA::VAddr vaddr); + PageTableEntry + kernel_pte_lookup(FunctionalPort *mem, Addr ptbr, AlphaISA::VAddr vaddr); -Addr vtophys(Addr vaddr); -Addr vtophys(ThreadContext *tc, Addr vaddr); + Addr vtophys(Addr vaddr); + Addr vtophys(ThreadContext *tc, Addr vaddr); -void CopyOut(ThreadContext *tc, void *dst, Addr src, size_t len); -void CopyIn(ThreadContext *tc, Addr dst, void *src, size_t len); -void CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen); -void CopyStringIn(ThreadContext *tc, char *src, Addr vaddr); + void CopyOut(ThreadContext *tc, void *dst, Addr src, size_t len); + void CopyIn(ThreadContext *tc, Addr dst, void *src, size_t len); + void CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen); + void CopyStringIn(ThreadContext *tc, char *src, Addr vaddr); }; #endif // __ARCH_ALPHA_VTOPHYS_H__ diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 622455745..801c96c88 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -29,6 +29,7 @@ */ #include "arch/utility.hh" +#include "arch/faults.hh" #include "base/cprintf.hh" #include "base/inifile.hh" #include "base/loader/symtab.hh" diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index 4322e8092..4d8771ddd 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -35,7 +35,7 @@ #include #include "arch/isa_traits.hh" -#include "arch/faults.hh" +#include "sim/faults.hh" #include "base/bitfield.hh" #include "base/hashmap.hh" #include "base/misc.hh" diff --git a/src/dev/platform.cc b/src/dev/platform.cc index 8546b7805..07288249c 100644 --- a/src/dev/platform.cc +++ b/src/dev/platform.cc @@ -29,6 +29,7 @@ * Nathan Binkert */ +#include "base/misc.hh" #include "dev/platform.hh" #include "sim/builder.hh" #include "sim/sim_exit.hh" -- cgit v1.2.3