From d2a0a2ec2202eb8fa04ddd3e359c1c9dc7f04cb1 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 19 Aug 2011 15:08:08 -0500 Subject: ARM: Add support for Versatile Express boards --- src/arch/arm/ArmSystem.py | 3 +- src/dev/arm/RealView.py | 81 +++++++++++++++++++++++++++++++++++++++++++++- src/dev/arm/rv_ctrl.cc | 10 ++++-- src/dev/arm/rv_ctrl.hh | 6 +++- src/dev/arm/timer_sp804.cc | 5 ++- 5 files changed, 97 insertions(+), 8 deletions(-) (limited to 'src') diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py index 9bd11041a..495211248 100644 --- a/src/arch/arm/ArmSystem.py +++ b/src/arch/arm/ArmSystem.py @@ -41,7 +41,8 @@ from System import System class ArmMachineType(Enum): map = {'RealView_EB' : 827, - 'RealView_PBX' : 1901 } + 'RealView_PBX' : 1901, + 'VersatileExpress' : 2272} class ArmSystem(System): type = 'ArmSystem' diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 70337e7d9..a56d53f00 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -75,7 +75,8 @@ class A9SCU(BasicPioDevice): class RealViewCtrl(BasicPioDevice): type = 'RealViewCtrl' - proc_id = Param.UInt32(0x0C000000, "Processor ID, SYS_PROCID") + proc_id0 = Param.UInt32(0x0C000000, "Processor ID, SYS_PROCID") + proc_id1 = Param.UInt32(0x0C000222, "Processor ID, SYS_PROCID1") idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID") class Gic(PioDevice): @@ -278,3 +279,81 @@ class RealViewEB(RealView): self.flash_fake.pio = bus.port self.smcreg_fake.pio = bus.port +class VExpress(RealView): + elba_uart = Pl011(pio_addr=0xE0009000, int_num=42) + uart = Pl011(pio_addr=0xFF009000, int_num=121) + realview_io = RealViewCtrl(proc_id0=0x0C000222, pio_addr=0xFF000000) + gic = Gic(dist_addr=0xE0201000, cpu_addr=0xE0200100) + local_cpu_timer = CpuLocalTimer(int_num_timer=29, int_num_watchdog=30, pio_addr=0xE0200600) + v2m_timer0 = Sp804(int_num0=120, int_num1=120, pio_addr=0xFF011000) + v2m_timer1 = Sp804(int_num0=121, int_num1=121, pio_addr=0xFF012000) + elba_timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0xE0011000, clock0='50MHz', clock1='50MHz') + elba_timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0xE0012000, clock0='50MHz', clock1='50MHz') + clcd = Pl111(pio_addr=0xE0022000, int_num=46) # CLCD interrupt no. unknown + kmi0 = Pl050(pio_addr=0xFF006000, int_num=124) + kmi1 = Pl050(pio_addr=0xFF007000, int_num=125) + elba_kmi0 = Pl050(pio_addr=0xE0006000, int_num=52) + elba_kmi1 = Pl050(pio_addr=0xE0007000, int_num=53) + a9scu = A9SCU(pio_addr=0xE0200000) + cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=0, + io_shift = 2, ctrl_offset = 2, Command = 0x1, + BAR0 = 0xFF01A000, BAR0Size = '256B', + BAR1 = 0xFF01A100, BAR1Size = '4096B', + BAR0LegacyIO = True, BAR1LegacyIO = True) + + l2x0_fake = IsaFake(pio_addr=0xE0202000, pio_size=0xfff) + dmac_fake = AmbaFake(pio_addr=0xE0020000) + uart1_fake = AmbaFake(pio_addr=0xE000A000) + uart2_fake = AmbaFake(pio_addr=0xE000B000) + uart3_fake = AmbaFake(pio_addr=0xE000C000) + smc_fake = AmbaFake(pio_addr=0xEC000000) + sp810_fake = AmbaFake(pio_addr=0xFF001000, ignore_access=True) + watchdog_fake = AmbaFake(pio_addr=0xE0010000) + aaci_fake = AmbaFake(pio_addr=0xFF004000) + elba_aaci_fake = AmbaFake(pio_addr=0xE0004000) + mmc_fake = AmbaFake(pio_addr=0xE0005000) # not sure if we need this + rtc_fake = AmbaFake(pio_addr=0xE0017000, amba_id=0x41031) + spsc_fake = IsaFake(pio_addr=0xE001B000, pio_size=0x2000) + lan_fake = IsaFake(pio_addr=0xFA000000, pio_size=0xffff) + usb_fake = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff) + + + # Attach I/O devices that are on chip + def attachOnChipIO(self, bus): + self.gic.pio = bus.port + self.a9scu.pio = bus.port + + # Attach I/O devices to specified bus object. Can't do this + # earlier, since the bus object itself is typically defined at the + # System level. + def attachIO(self, bus): + self.elba_uart.pio = bus.port + self.uart.pio = bus.port + self.realview_io.pio = bus.port + self.local_cpu_timer.pio = bus.port + self.v2m_timer0.pio = bus.port + self.v2m_timer1.pio = bus.port + self.elba_timer0.pio = bus.port + self.elba_timer1.pio = bus.port + self.clcd.pio = bus.port + self.kmi0.pio = bus.port + self.kmi1.pio = bus.port + self.elba_kmi0.pio = bus.port + self.elba_kmi1.pio = bus.port + self.cf_ctrl.pio = bus.port + self.l2x0_fake.pio = bus.port + self.dmac_fake.pio = bus.port + self.uart1_fake.pio = bus.port + self.uart2_fake.pio = bus.port + self.uart3_fake.pio = bus.port + self.smc_fake.pio = bus.port + self.sp810_fake.pio = bus.port + self.watchdog_fake.pio = bus.port + self.aaci_fake.pio = bus.port + self.elba_aaci_fake.pio = bus.port + self.mmc_fake.pio = bus.port + self.rtc_fake.pio = bus.port + self.spsc_fake.pio = bus.port + self.lan_fake.pio = bus.port + self.usb_fake.pio = bus.port + diff --git a/src/dev/arm/rv_ctrl.cc b/src/dev/arm/rv_ctrl.cc index 9c546036a..82710c730 100644 --- a/src/dev/arm/rv_ctrl.cc +++ b/src/dev/arm/rv_ctrl.cc @@ -57,8 +57,11 @@ RealViewCtrl::read(PacketPtr pkt) pkt->allocate(); switch(daddr) { - case ProcId: - pkt->set(params()->proc_id); + case ProcId0: + pkt->set(params()->proc_id0); + break; + case ProcId1: + pkt->set(params()->proc_id1); break; case Clock24: Tick clk; @@ -131,6 +134,9 @@ RealViewCtrl::write(PacketPtr pkt) case Flags: flags = pkt->get(); break; + case FlagsClr: + flags = 0; + break; default: warn("Tried to write RVIO at offset %#x that doesn't exist\n", daddr); diff --git a/src/dev/arm/rv_ctrl.hh b/src/dev/arm/rv_ctrl.hh index 255b21c0f..cf14f6bcd 100644 --- a/src/dev/arm/rv_ctrl.hh +++ b/src/dev/arm/rv_ctrl.hh @@ -79,7 +79,11 @@ class RealViewCtrl : public BasicPioDevice Clock24 = 0x5C, Misc = 0x60, IoSel = 0x70, - ProcId = 0x84, + ProcId0 = 0x84, + ProcId1 = 0x88, + CfgCtrl = 0xA0, + CfgData = 0xA4, + CfgStat = 0xA8, TestOsc0 = 0xC0, TestOsc1 = 0xC4, TestOsc2 = 0xC8, diff --git a/src/dev/arm/timer_sp804.cc b/src/dev/arm/timer_sp804.cc index 5ecfebc71..323597a98 100644 --- a/src/dev/arm/timer_sp804.cc +++ b/src/dev/arm/timer_sp804.cc @@ -85,8 +85,6 @@ Sp804::read(PacketPtr pkt) void Sp804::Timer::read(PacketPtr pkt, Addr daddr) { - DPRINTF(Timer, "Reading from Timer at offset: %#x\n", daddr); - switch(daddr) { case LoadReg: pkt->set(loadValue); @@ -116,6 +114,7 @@ Sp804::Timer::read(PacketPtr pkt, Addr daddr) panic("Tried to read SP804 timer at offset %#x\n", daddr); break; } + DPRINTF(Timer, "Reading %#x from Timer at offset: %#x\n", pkt->get(), daddr); } Tick @@ -140,7 +139,7 @@ Sp804::write(PacketPtr pkt) void Sp804::Timer::write(PacketPtr pkt, Addr daddr) { - DPRINTF(Timer, "Writing to Timer at offset: %#x\n", daddr); + DPRINTF(Timer, "Writing %#x to Timer at offset: %#x\n", pkt->get(), daddr); switch (daddr) { case LoadReg: loadValue = pkt->get(); -- cgit v1.2.3