From e8e1ddd5305c4f7d4764f2cd28f70f911a29806f Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 4 Aug 2007 15:56:48 -0700 Subject: SimpleCPU: Add some DPRINTFs --HG-- extra : convert_revision : 5fdd5a9595c3e5d6ce5f9e8c9af0a8e6c857551c --- src/cpu/simple/atomic.cc | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src') diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 604c48086..704b65f36 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -183,6 +183,7 @@ AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion) void AtomicSimpleCPU::resume() { + DPRINTF(SimpleCPU, "Resume\n"); if (_status != SwitchedOut && _status != Idle) { assert(system->getMemoryMode() == Enums::atomic); @@ -231,6 +232,8 @@ AtomicSimpleCPU::takeOverFrom(BaseCPU *oldCPU) void AtomicSimpleCPU::activateContext(int thread_num, int delay) { + DPRINTF(SimpleCPU, "ActivateContext %d (%d cycles)\n", thread_num, delay); + assert(thread_num == 0); assert(thread); @@ -248,6 +251,8 @@ AtomicSimpleCPU::activateContext(int thread_num, int delay) void AtomicSimpleCPU::suspendContext(int thread_num) { + DPRINTF(SimpleCPU, "SuspendContext %d\n", thread_num); + assert(thread_num == 0); assert(thread); @@ -483,6 +488,8 @@ AtomicSimpleCPU::write(int32_t data, Addr addr, unsigned flags, uint64_t *res) void AtomicSimpleCPU::tick() { + DPRINTF(SimpleCPU, "Tick\n"); + Tick latency = cycles(1); // instruction takes one cycle by default for (int i = 0; i < width; ++i) { -- cgit v1.2.3