From fc8b4f52537dafdfe10a9be912fe3f069d8a570d Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Fri, 11 Aug 2006 20:29:15 -0400
Subject: Started to add support for O3 for sparc.

--HG--
extra : convert_revision : 3f94bda14024a09b9fbd7a5d13284d4987349ddf
---
 src/cpu/o3/SConscript  | 13 ++++++-------
 src/cpu/o3/dyn_inst.hh |  4 ++++
 2 files changed, 10 insertions(+), 7 deletions(-)

(limited to 'src')

diff --git a/src/cpu/o3/SConscript b/src/cpu/o3/SConscript
index 44882e5ec..afbd4c533 100755
--- a/src/cpu/o3/SConscript
+++ b/src/cpu/o3/SConscript
@@ -59,13 +59,12 @@ elif env['TARGET_ISA'] == 'mips':
         mips/cpu_builder.cc
         ''')
 elif env['TARGET_ISA'] == 'sparc':
-    sys.exit('O3 CPU does not support Sparc')
-    #sources += Split('''
-    #    sparc/dyn_inst.cc
-    #    sparc/cpu.cc
-    #    sparc/thread_context.cc
-    #    sparc/cpu_builder.cc
-    #    ''')
+    sources += Split('''
+        sparc/dyn_inst.cc
+        sparc/cpu.cc
+        sparc/thread_context.cc
+        sparc/cpu_builder.cc
+        ''')
 else:
     sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA'])
 
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 5f7caf79f..279513493 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -41,6 +41,10 @@
     template <class Impl> class MipsDynInst;
     struct MipsSimpleImpl;
     typedef MipsDynInst<MipsSimpleImpl> O3DynInst;
+#elif THE_ISA == SPARC_ISA
+    template <class Impl> class SparcDynInst;
+    struct SparcSimpleImpl;
+    typedef SparcDynInst<SparcSimpleImpl> O3DynInst;
 #else
     #error "O3DynInst not defined for this ISA"
 #endif
-- 
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