From 66b80038edaabb1fd757a62e4cbf04094262c116 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Tue, 23 Nov 2004 03:40:32 -0500 Subject: Makefile cleanup, no seperate middle preprocessing steps anymore --- system/alpha/console/Makefile | 42 +++---- system/alpha/console/dbmentry.S | 242 +++++++++++++++++++++++++++++++++++++ system/alpha/console/dbmentry.s | 242 ------------------------------------- system/alpha/console/paljtokern.S | 156 ++++++++++++++++++++++++ system/alpha/console/paljtokern.s | 156 ------------------------ system/alpha/console/paljtoslave.S | 151 +++++++++++++++++++++++ system/alpha/console/paljtoslave.s | 151 ----------------------- 7 files changed, 564 insertions(+), 576 deletions(-) create mode 100644 system/alpha/console/dbmentry.S delete mode 100644 system/alpha/console/dbmentry.s create mode 100644 system/alpha/console/paljtokern.S delete mode 100644 system/alpha/console/paljtokern.s create mode 100644 system/alpha/console/paljtoslave.S delete mode 100644 system/alpha/console/paljtoslave.s (limited to 'system') diff --git a/system/alpha/console/Makefile b/system/alpha/console/Makefile index c1d783c24..766cf683d 100644 --- a/system/alpha/console/Makefile +++ b/system/alpha/console/Makefile @@ -1,9 +1,5 @@ DBMENTRY = fffffc0000010000 -INCLUDES = -I$(PALCODE) -I$(INCLUDEH) -I$(M5)/dev - -SOURDIR = ./ -PALCODE = ../palcode -INCLUDEH = ../h +CFLAGS=-I . -I ../h -I$(M5)/dev -nostdinc++ -Wa,-m21164 ARCHNAME=$(shell uname -m) @@ -11,10 +7,13 @@ ARCHNAME=$(shell uname -m) ifneq ($(ARCHNAME), alpha) CC=alpha-unknown-linux-gnu-gcc AS=alpha-unknown-linux-gnu-as -CXX=alpha-unknown-linux-gnu-g++ LD=alpha-unknown-linux-gnu-ld endif +OBJS=dbmentry.o printf.o paljtokern.o paljtoslave.o +TLOBJS+=$(OBJS) console_tl.o +TSOBJS+=$(OBJS) console_ts.o + ### Make sure that the M5 variable is set ### ifndef M5 $(error The M5 variable must be set) @@ -22,37 +21,26 @@ endif all: console_tl console_ts -dbmentry.o: dbmentry.s - g++ -I ../h -I ../palcode -E -P -nostdinc -nostdinc++ -x c++ dbmentry.s | \ - $(AS) -m 21164 -o dbmentry.s.o +%.o: %.S + $(CC) $(CFLAGS) -nostdinc -o $@ -c $< console_ts.o: console.c - $(CC) -g3 $(INCLUDES) -D _TIME_T -D TSUNAMI -nostdinc++ -o console_ts.o -c console.c + $(CC) -g3 $(CFLAGS) -D _TIME_T -D TSUNAMI -o $@ -c $< console_tl.o: console.c - $(CC) -g3 $(INCLUDES) -D _TIME_T -D TLASER -nostdinc++ -o console_tl.o -c console.c + $(CC) -g3 $(CFLAGS) -D _TIME_T -D TLASER -o $@ -c $< printf.o: printf.c - $(CC) -g3 $(INCLUDES) -nostdinc++ -o $*.o -c $*.c - -paljtokern.s.o: paljtokern.s - g++ -I ../h -E -P -nostdinc -nostdinc++ -x c++ paljtokern.s | \ - $(AS) -m 21164 -o paljtokern.s.o - -paljtoslave.s.o: paljtoslave.s - g++ -I ../h -E -P -nostdinc -nostdinc++ -x c++ paljtoslave.s | \ - $(AS) -m 21164 -o paljtoslave.s.o + $(CC) -g3 $(CFLAGS) -o $@ -c $< -console_ts: console_ts.o dbmentry.o printf.o paljtokern.s.o paljtoslave.s.o - $(LD) -o console_ts -N -Ttext $(DBMENTRY) -non_shared \ - dbmentry.s.o console_ts.o printf.o paljtokern.s.o paljtoslave.s.o -lc +console_ts: $(TSOBJS) + $(LD) -o console_ts -N -Ttext $(DBMENTRY) -non_shared $(TSOBJS) -lc -console_tl: console_tl.o dbmentry.o printf.o paljtokern.s.o paljtoslave.s.o - $(LD) -o console_tl -N -Ttext $(DBMENTRY) -non_shared \ - dbmentry.s.o console_tl.o printf.o paljtokern.s.o paljtoslave.s.o -lc +console_tl: $(TLOBJS) + $(LD) -o console_tl -N -Ttext $(DBMENTRY) -non_shared $(TLOBJS) -lc install: console scp console zizzer.eecs.umich.edu:/z/m5/system/testing/binaries/console clean: - rm -f *.o console *.strip paljtokern.c paljtoslave.c + rm -f *.o console_t? diff --git a/system/alpha/console/dbmentry.S b/system/alpha/console/dbmentry.S new file mode 100644 index 000000000..f540d492a --- /dev/null +++ b/system/alpha/console/dbmentry.S @@ -0,0 +1,242 @@ + +/* taken from ebfw/rom/dbmentry.s */ + +#define EB164 +/*#ifndef LINT +.data +.asciiz "$Id: dbmentry.s,v 1.1.1.1 1997/10/30 23:27:12 verghese Exp $" +.text +#endif +*/ +/* + * Debug Monitor Entry code + */ + +#ifndef MAKEDEPEND +#include "ev5_impure.h" +#include "cserve.h" +#include "fromHudsonOsf.h" +#endif + +//#include "paldefs.h" +#include "regdefs.h" +#include "eb164.h" +//#include "ledcodes.h" + + .text + +/* return address and padding to octaword align */ +#define STARTFRM 16 + + .globl __start + .ent __start, 0 +__start: +_entry: + br t0, 2f # get the current PC +2: ldgp gp, 0(t0) # init gp + + +#ifdef original_xxm + lda a2, CSERVE_K_RD_IMPURE + call_pal PAL_CSERVE_ENTRY + lda v0, CNS_Q_BASE(v0) + + # Add KSEG offset to the impure area + subq zero, 1, t0 + sll t0, 42, t0 + addq t0, v0, v0 + + lda t0, CNS_Q_SIGNATURE(v0) + bic t0, 0x07, t0 # Clear bottom 3 bits to avoid + # allignment errors if the + # impure area is total rubbish + ldq t0, 0x00(t0) + srl t0, 16, t0 # Shift signature into bottom 16 bits. + lda t6, 0xDECB(zero) # Load the expected valid signature. + zap t6, 0xFC, t6 # Clear the upper bits. + cmpeq t0, t6, t0 # Is this a valid signature? + beq t0, 1f # Not valid, don't trust input params. + +/* + * Init the stack at the first 8K boundary + * below the top of memory. + */ + lda t0, CNS_Q_MEM_SIZE(v0) + ldq t0, 0x00(t0) # Load memory size. + subq t0, 1, t0 # Last address in memory + srl t0, 13, t0 # Align to first 8KB boundary + sll t0, 13, sp # below the top of memory. + br zero, 2f + +/* + * If memory size was not passed in via the + * PALcode impure data use the system specific + * MINIMUM_SYSTEM_MEMORY definition. + */ +1: + lda sp, (MINIMUM_SYSTEM_MEMORY&0xffff)(zero) + ldah sp, ((MINIMUM_SYSTEM_MEMORY+0x8000)>>16)(sp) + lda t0, (8*1024)(zero) # Allow for 8KB guard page. + subq sp, t0, sp + +2: + +#endif /* original_xxm */ + + + /* + * SimOS. Stack pointer is start of a valid phys or KSEG page + */ + + bis sp,sp,s0 /* save sp */ + +slave: lda v0,(8*1024)(sp) /* end of page */ + + subq zero, 1, t0 + sll t0, 42, t0 + bis t0, v0, sp + +#ifdef original_xxm + # Add KSEG offset to the stack pointer + subq zero, 1, t0 + sll t0, 42, t0 + addq t0, sp, sp +#endif + + lda sp, -STARTFRM(sp) # Create a stack frame + stq ra, 0(sp) # Place return address on the stack + + .mask 0x84000000, -8 + .frame sp, STARTFRM, ra + +/* + * Enable the Floating Point Unit + */ + lda a0, 1(zero) + call_pal PAL_WRFEN_ENTRY + +/* + * Every good C program has a main() + */ + + beq s0,master + + call_pal PAL_WHAMI_ENTRY + bis v0,v0,a0 + jsr ra, SlaveLoop +master: + jsr ra, main + + + +/* + * The Debug Monitor should never return. + * However, just incase... + */ + ldgp gp, 0(ra) + bsr zero, _exit + +.end __start + + + + .globl _exit + .ent _exit, 0 +_exit: + + ldq ra, 0(sp) # restore return address + lda sp, STARTFRM(sp) # prune back the stack + ret zero, (ra) # Back from whence we came +.end _exit + + .globl cServe + .ent cServe 2 +cServe: + .option O1 + .frame sp, 0, ra + call_pal PAL_CSERVE_ENTRY + ret zero, (ra) + .end cServe + + .globl wrfen + .ent wrfen 2 +wrfen: + .option O1 + .frame sp, 0, ra + call_pal PAL_WRFEN_ENTRY + ret zero, (ra) + .end wrfen + .globl consoleCallback + .ent consoleCallback 2 +consoleCallback: + br t0, 2f # get the current PC +2: ldgp gp, 0(t0) # init gp + lda sp,-64(sp) + stq ra,0(sp) + jsr CallBackDispatcher + ldq ra,0(sp) + lda sp,64(sp) + ret zero,(ra) + .end consoleCallback + + + .globl consoleFixup + .ent consoleFixup 2 +consoleFixup: + br t0, 2f # get the current PC +2: ldgp gp, 0(t0) # init gp + lda sp,-64(sp) + stq ra,0(sp) + jsr CallBackFixup + ldq ra,0(sp) + lda sp,64(sp) + ret zero,(ra) + .end consoleFixup + + + + .globl SpinLock + .ent SpinLock 2 +SpinLock: +1: + ldq_l a1,0(a0) # interlock complete lock state + subl ra,3,v0 # get calling addr[31:0] + 1 + blbs a1,2f # branch if lock is busy + stq_c v0,0(a0) # attempt to acquire lock + beq v0,2f # branch if lost atomicity + mb # ensure memory coherence + ret zero,(ra) # return to caller (v0 is 1) +2: + br zero,1b + .end SpinLock + + .globl loadContext + .ent loadContext 2 +loadContext: + .option O1 + .frame sp, 0, ra + call_pal PAL_SWPCTX_ENTRY + ret zero, (ra) + .end loadContext + + + .globl SlaveSpin # Very carefully spin wait + .ent SlaveSpin 2 # and swap context without +SlaveSpin: # using any stack space + .option O1 + .frame sp, 0, ra + mov a0, t0 # cpu number + mov a1, t1 # cpu rpb pointer (virtual) + mov a2, t2 # what to spin on + +test: ldl t3, 0(t2) + beq t3, test + zapnot t1,0x1f,a0 # make rpb physical + call_pal PAL_SWPCTX_ENTRY # switch to pcb + mov t0, a0 # setup args for SlaveCmd + mov t1, a1 + jsr SlaveCmd # call SlaveCmd + ret zero, (ra) # Should never be reached + .end SlaveSpin + + diff --git a/system/alpha/console/dbmentry.s b/system/alpha/console/dbmentry.s deleted file mode 100644 index 7a718928b..000000000 --- a/system/alpha/console/dbmentry.s +++ /dev/null @@ -1,242 +0,0 @@ - -/* taken from ebfw/rom/dbmentry.s */ - -#define EB164 -/*#ifndef LINT -.data -.asciiz "$Id: dbmentry.s,v 1.1.1.1 1997/10/30 23:27:12 verghese Exp $" -.text -#endif -*/ -/* - * Debug Monitor Entry code - */ - -#ifndef MAKEDEPEND -#include "ev5_impure.h" -#include "cserve.h" -#include "fromHudsonOsf.h" -#endif - -//#include "paldefs.h" -#include "regdefs.h" -#include "eb164.h" -//#include "ledcodes.h" - - .text - -/* return address and padding to octaword align */ -#define STARTFRM 16 - - .globl __start - .ent __start, 0 -__start: -_entry: - br t0, 2f # get the current PC -2: ldgp gp, 0(t0) # init gp - - -#ifdef original_xxm - lda a2, CSERVE_K_RD_IMPURE - call_pal PAL_CSERVE_ENTRY - lda v0, CNS_Q_BASE(v0) - - # Add KSEG offset to the impure area - subq zero, 1, t0 - sll t0, 42, t0 - addq t0, v0, v0 - - lda t0, CNS_Q_SIGNATURE(v0) - bic t0, 0x07, t0 # Clear bottom 3 bits to avoid - # allignment errors if the - # impure area is total rubbish - ldq t0, 0x00(t0) - srl t0, 16, t0 # Shift signature into bottom 16 bits. - lda t6, 0xDECB(zero) # Load the expected valid signature. - zap t6, 0xFC, t6 # Clear the upper bits. - cmpeq t0, t6, t0 # Is this a valid signature? - beq t0, 1f # Not valid, don't trust input params. - -/* - * Init the stack at the first 8K boundary - * below the top of memory. - */ - lda t0, CNS_Q_MEM_SIZE(v0) - ldq t0, 0x00(t0) # Load memory size. - subq t0, 1, t0 # Last address in memory - srl t0, 13, t0 # Align to first 8KB boundary - sll t0, 13, sp # below the top of memory. - br zero, 2f - -/* - * If memory size was not passed in via the - * PALcode impure data use the system specific - * MINIMUM_SYSTEM_MEMORY definition. - */ -1: - lda sp, (MINIMUM_SYSTEM_MEMORY&0xffff)(zero) - ldah sp, ((MINIMUM_SYSTEM_MEMORY+0x8000)>>16)(sp) - lda t0, (8*1024)(zero) # Allow for 8KB guard page. - subq sp, t0, sp - -2: - -#endif /* original_xxm */ - - - /* - * SimOS. Stack pointer is start of a valid phys or KSEG page - */ - - bis sp,sp,s0 /* save sp */ - -slave: lda v0,(8*1024)(sp) /* end of page */ - - subq zero, 1, t0 - sll t0, 42, t0 - bis t0, v0, sp - -#ifdef original_xxm - # Add KSEG offset to the stack pointer - subq zero, 1, t0 - sll t0, 42, t0 - addq t0, sp, sp -#endif - - lda sp, -STARTFRM(sp) # Create a stack frame - stq ra, 0(sp) # Place return address on the stack - - .mask 0x84000000, -8 - .frame sp, STARTFRM, ra - -/* - * Enable the Floating Point Unit - */ - lda a0, 1(zero) - call_pal PAL_WRFEN_ENTRY - -/* - * Every good C program has a main() - */ - - beq s0,master - - call_pal PAL_WHAMI_ENTRY - bis v0,v0,a0 - jsr ra, SlaveLoop -master: - jsr ra, main - - - -/* - * The Debug Monitor should never return. - * However, just incase... - */ - ldgp gp, 0(ra) - bsr zero, _exit - -.end __start - - - - .globl _exit - .ent _exit, 0 -_exit: - - ldq ra, 0(sp) # restore return address - lda sp, STARTFRM(sp) # prune back the stack - ret zero, (ra) # Back from whence we came -.end _exit - - .globl cServe - .ent cServe 2 -cServe: - .option O1 - .frame sp, 0, ra - call_pal PAL_CSERVE_ENTRY - ret zero, (ra) - .end cServe - - .globl wrfen - .ent wrfen 2 -wrfen: - .option O1 - .frame sp, 0, ra - call_pal PAL_WRFEN_ENTRY - ret zero, (ra) - .end wrfen - .globl consoleCallback - .ent consoleCallback 2 -consoleCallback: - br t0, 2f # get the current PC -2: ldgp gp, 0(t0) # init gp - lda sp,-64(sp) - stq ra,0(sp) - jsr CallBackDispatcher - ldq ra,0(sp) - lda sp,64(sp) - ret zero,(ra) - .end consoleCallback - - - .globl consoleFixup - .ent consoleFixup 2 -consoleFixup: - br t0, 2f # get the current PC -2: ldgp gp, 0(t0) # init gp - lda sp,-64(sp) - stq ra,0(sp) - jsr CallBackFixup - ldq ra,0(sp) - lda sp,64(sp) - ret zero,(ra) - .end consoleFixup - - - - .globl SpinLock - .ent SpinLock 2 -SpinLock: -1: - ldq_l a1,0(a0) # interlock complete lock state - subl ra,3,v0 # get calling addr[31:0] + 1 - blbs a1,2f # branch if lock is busy - stq_c v0,0(a0) # attempt to acquire lock - beq v0,2f # branch if lost atomicity - mb # ensure memory coherence - ret zero,(ra) # return to caller (v0 is 1) -2: - br zero,1b - .end SpinLock - - .globl loadContext - .ent loadContext 2 -loadContext: - .option O1 - .frame sp, 0, ra - call_pal PAL_SWPCTX_ENTRY - ret zero, (ra) - .end loadContext - - - .globl SlaveSpin # Very carefully spin wait - .ent SlaveSpin 2 # and swap context without -SlaveSpin: # using any stack space - .option O1 - .frame sp, 0, ra - mov a0, t0 # cpu number - mov a1, t1 # cpu rpb pointer (virtual) - mov a2, t2 # what to spin on - -test: ldl t3, 0(t2) - beq t3, test - zapnot t1,0x1f,a0 # make rpb physical - call_pal PAL_SWPCTX_ENTRY # switch to pcb - mov t0, a0 # setup args for SlaveCmd - mov t1, a1 - jsr SlaveCmd # call SlaveCmd - ret zero, (ra) # Should never be reached - .end SlaveSpin - - diff --git a/system/alpha/console/paljtokern.S b/system/alpha/console/paljtokern.S new file mode 100644 index 000000000..e33177dd4 --- /dev/null +++ b/system/alpha/console/paljtokern.S @@ -0,0 +1,156 @@ +#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions +#include "ev5_defs.h" +#include "fromHudsonOsf.h" // OSF/1 specific definitions +#include "fromHudsonMacros.h" // Global macro definitions +#include "ev5_impure.h" // Scratch & logout area data structures +#include "platform.h" // Platform specific definitions + + .global palJToKern + .text 3 +palJToKern: +/* Jump to kernel +args: + Kernel address - a0 + PCBB - a1 + First free PFN - a3? + + Enable kseg addressing in ICSR + Enable kseg addressing in MCSR + Set VTBR -- Set to 1GB as per SRM, or maybe 8GB?? + Set PCBB -- pass pointer in arg + Set PTBR -- get it out of PCB + Set KSP -- get it out of PCB + + Jump to kernel address + + Kernel args- + s0 first free PFN + s1 ptbr + s2 argc 0 + s3 argv NULL + s5 osf_param (sysconfigtab) NULL + */ + + ALIGN_BRANCH + + ldq_p a0, 0(zero) + ldq_p a1, 8(zero) + ldq_p a3, 16(zero) + +#ifdef undef + LDLI(t0,0x200000000) // 8GB, like the Mikasa + LDLI(t0,0x40000000) // 1GB, like the SRM + STALL // don't dual issue the load with mtpr -pb +#endif + /* Point the Vptbr at 8GB */ + lda t0, 0x1(zero) + sll t0, 33, t0 + + mtpr t0, mVptBr // Load Mbox copy + mtpr t0, iVptBr // Load Ibox copy + STALL // don't dual issue the load with mtpr -pb + + /* Turn on superpage mapping in the mbox and icsr */ + lda t0, (2< + STALL // don't dual issue the load with mtpr -pb + mtpr t0, mcsr // Set the super page mode enable bit + STALL // don't dual issue the load with mtpr -pb + + lda t0, 0(zero) + mtpr t0, dtbAsn + mtpr t0, itbAsn + + LDLI (t1,0x20000000) + STALL // don't dual issue the load with mtpr -pb + mfpr t0, icsr // Enable superpage mapping + STALL // don't dual issue the load with mtpr -pb + bis t0, t1, t0 + mtpr t0, icsr + + STALL // Required stall to update chip ... + STALL + STALL + STALL + STALL + + ldq_p s0, PCB_Q_PTBR(a1) + sll s0, VA_S_OFF, s0 // Shift PTBR into position + STALL // don't dual issue the load with mtpr -pb + mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1 + STALL // don't dual issue the load with mtpr -pb + ldq_p sp, PCB_Q_KSP(a1) + + mtpr a0, excAddr // Load the dispatch address. + STALL // don't dual issue the load with mtpr -pb + bis a3, zero, a0 // first free PFN + ldq_p a1, PCB_Q_PTBR(a1) // ptbr + ldq_p a2, 24(zero) // argc + ldq_p a3, 32(zero) // argv + ldq_p a4, 40(zero) // environ + lda a5, 0(zero) // osf_param + STALL // don't dual issue the load with mtpr -pb + mtpr zero, dtbIa // Flush all D-stream TB entries + mtpr zero, itbIa // Flush all I-stream TB entries + br zero, 2f + + ALIGN_BLOCK + +2: NOP + mtpr zero, icFlush // Flush the icache. + NOP + NOP + + NOP // Required NOPs ... 1-10 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + NOP // Required NOPs ... 11-20 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + NOP // Required NOPs ... 21-30 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + NOP // Required NOPs ... 31-40 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + + + NOP // Required NOPs ... 41-44 + NOP + NOP + NOP + + hw_rei_stall // Dispatch to kernel + + diff --git a/system/alpha/console/paljtokern.s b/system/alpha/console/paljtokern.s deleted file mode 100644 index 66b593461..000000000 --- a/system/alpha/console/paljtokern.s +++ /dev/null @@ -1,156 +0,0 @@ -#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions -#include "ev5_defs.h" -#include "fromHudsonOsf.h" // OSF/1 specific definitions -#include "fromHudsonMacros.h" // Global macro definitions -#include "ev5_impure.h" // Scratch & logout area data structures -#include "platform.h" // Platform specific definitions - - .global palJToKern - .text 3 -palJToKern: -/* Jump to kernel -args: - Kernel address - a0 - PCBB - a1 - First free PFN - a3? - - Enable kseg addressing in ICSR - Enable kseg addressing in MCSR - Set VTBR -- Set to 1GB as per SRM, or maybe 8GB?? - Set PCBB -- pass pointer in arg - Set PTBR -- get it out of PCB - Set KSP -- get it out of PCB - - Jump to kernel address - - Kernel args- - s0 first free PFN - s1 ptbr - s2 argc 0 - s3 argv NULL - s5 osf_param (sysconfigtab) NULL - */ - - ALIGN_BRANCH - - ldq_p a0, 0(zero) - ldq_p a1, 8(zero) - ldq_p a3, 16(zero) - -#ifdef undef - LDLI(t0,0x200000000) // 8GB, like the Mikasa - LDLI(t0,0x40000000) // 1GB, like the SRM - STALL // don't dual issue the load with mtpr -pb -#endif - /* Point the Vptbr at 8GB */ - lda t0, 0x1(zero) - sll t0, 33, t0 - - mtpr t0, mVptBr // Load Mbox copy - mtpr t0, iVptBr // Load Ibox copy - STALL // don't dual issue the load with mtpr -pb - - /* Turn on superpage mapping in the mbox and icsr */ - lda t0, (2< - STALL // don't dual issue the load with mtpr -pb - mtpr t0, mcsr // Set the super page mode enable bit - STALL // don't dual issue the load with mtpr -pb - - lda t0, 0(zero) - mtpr t0, dtbAsn - mtpr t0, itbAsn - - LDLI (t1,0x20000000) - STALL // don't dual issue the load with mtpr -pb - mfpr t0, icsr // Enable superpage mapping - STALL // don't dual issue the load with mtpr -pb - bis t0, t1, t0 - mtpr t0, icsr - - STALL // Required stall to update chip ... - STALL - STALL - STALL - STALL - - ldq_p s0, PCB_Q_PTBR(a1) - sll s0, VA_S_OFF, s0 // Shift PTBR into position - STALL // don't dual issue the load with mtpr -pb - mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1 - STALL // don't dual issue the load with mtpr -pb - ldq_p sp, PCB_Q_KSP(a1) - - mtpr a0, excAddr // Load the dispatch address. - STALL // don't dual issue the load with mtpr -pb - bis a3, zero, a0 // first free PFN - ldq_p a1, PCB_Q_PTBR(a1) // ptbr - ldq_p a2, 24(zero) // argc - ldq_p a3, 32(zero) // argv - ldq_p a4, 40(zero) // environ - lda a5, 0(zero) // osf_param - STALL // don't dual issue the load with mtpr -pb - mtpr zero, dtbIa // Flush all D-stream TB entries - mtpr zero, itbIa // Flush all I-stream TB entries - br zero, 2f - - ALIGN_BLOCK - -2: NOP - mtpr zero, icFlush // Flush the icache. - NOP - NOP - - NOP // Required NOPs ... 1-10 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - NOP // Required NOPs ... 11-20 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - NOP // Required NOPs ... 21-30 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - NOP // Required NOPs ... 31-40 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - - - NOP // Required NOPs ... 41-44 - NOP - NOP - NOP - - hw_rei_stall // Dispatch to kernel - - diff --git a/system/alpha/console/paljtoslave.S b/system/alpha/console/paljtoslave.S new file mode 100644 index 000000000..ebf30298a --- /dev/null +++ b/system/alpha/console/paljtoslave.S @@ -0,0 +1,151 @@ +#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions +#include "ev5_defs.h" +#include "fromHudsonOsf.h" // OSF/1 specific definitions +#include "fromHudsonMacros.h" // Global macro definitions +#include "ev5_impure.h" // Scratch & logout area data structures +#include "platform.h" // Platform specific definitions + + + .global palJToSlave + .text 3 + + /* + * args: + a0: here + a1: boot location + a2: CSERVE_J_KTOPAL + a3: restrart_pv + a4: vptb + a5: my_rpb + + */ +palJToSlave: + + /* + * SRM Console Architecture III 3-26 + */ + + ALIGN_BRANCH + + bis a3, zero, pv + bis zero, zero, t11 + bis zero, zero, ra + + /* Point the Vptbr to a2 */ + + mtpr a4, mVptBr // Load Mbox copy + mtpr a4, iVptBr // Load Ibox copy + STALL // don't dual issue the load with mtpr -pb + + /* Turn on superpage mapping in the mbox and icsr */ + lda t0, (2< + STALL // don't dual issue the load with mtpr -pb + mtpr t0, mcsr // Set the super page mode enable bit + STALL // don't dual issue the load with mtpr -pb + + lda t0, 0(zero) + mtpr t0, dtbAsn + mtpr t0, itbAsn + + LDLI (t1,0x20000000) + STALL // don't dual issue the load with mtpr -pb + mfpr t0, icsr // Enable superpage mapping + STALL // don't dual issue the load with mtpr -pb + bis t0, t1, t0 + mtpr t0, icsr + + STALL // Required stall to update chip ... + STALL + STALL + STALL + STALL + + ldq_p s0, PCB_Q_PTBR(a5) + sll s0, VA_S_OFF, s0 // Shift PTBR into position + STALL // don't dual issue the load with mtpr -pb + mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1 + STALL // don't dual issue the load with mtpr -pb + ldq_p sp, PCB_Q_KSP(a5) + + //mtpr a0, excAddr // Load the dispatch address. + //STALL // don't dual issue the load with mtpr -pb + //bis a3, zero, a0 // first free PFN + // ldq_p a1, PCB_Q_PTBR(a5) // ptbr + + //ldq_p a2, 24(zero) // argc + //ldq_p a3, 32(zero) // argv + //ldq_p a4, 40(zero) // environ + //lda a5, 0(zero) // osf_param + //STALL // don't dual issue the load with mtpr -pb + mtpr zero, dtbIa // Flush all D-stream TB entries + mtpr zero, itbIa // Flush all I-stream TB entries + + + mtpr a1, excAddr // Load the dispatch address. + + STALL // don't dual issue the load with mtpr -pb + STALL // don't dual issue the load with mtpr -pb + mtpr zero, dtbIa // Flush all D-stream TB entries + mtpr zero, itbIa // Flush all I-stream TB entries + br zero, 2f + + ALIGN_BLOCK + +2: NOP + mtpr zero, icFlush // Flush the icache. + NOP + NOP + + NOP // Required NOPs ... 1-10 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + NOP // Required NOPs ... 11-20 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + NOP // Required NOPs ... 21-30 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + NOP // Required NOPs ... 31-40 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + + + + NOP // Required NOPs ... 41-44 + NOP + NOP + NOP + + hw_rei_stall // Dispatch to kernel + diff --git a/system/alpha/console/paljtoslave.s b/system/alpha/console/paljtoslave.s deleted file mode 100644 index 3c3abd01c..000000000 --- a/system/alpha/console/paljtoslave.s +++ /dev/null @@ -1,151 +0,0 @@ -#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions -#include "ev5_defs.h" -#include "fromHudsonOsf.h" // OSF/1 specific definitions -#include "fromHudsonMacros.h" // Global macro definitions -#include "ev5_impure.h" // Scratch & logout area data structures -#include "platform.h" // Platform specific definitions - - - .global palJToSlave - .text 3 - - /* - * args: - a0: here - a1: boot location - a2: CSERVE_J_KTOPAL - a3: restrart_pv - a4: vptb - a5: my_rpb - - */ -palJToSlave: - - /* - * SRM Console Architecture III 3-26 - */ - - ALIGN_BRANCH - - bis a3, zero, pv - bis zero, zero, t11 - bis zero, zero, ra - - /* Point the Vptbr to a2 */ - - mtpr a4, mVptBr // Load Mbox copy - mtpr a4, iVptBr // Load Ibox copy - STALL // don't dual issue the load with mtpr -pb - - /* Turn on superpage mapping in the mbox and icsr */ - lda t0, (2< - STALL // don't dual issue the load with mtpr -pb - mtpr t0, mcsr // Set the super page mode enable bit - STALL // don't dual issue the load with mtpr -pb - - lda t0, 0(zero) - mtpr t0, dtbAsn - mtpr t0, itbAsn - - LDLI (t1,0x20000000) - STALL // don't dual issue the load with mtpr -pb - mfpr t0, icsr // Enable superpage mapping - STALL // don't dual issue the load with mtpr -pb - bis t0, t1, t0 - mtpr t0, icsr - - STALL // Required stall to update chip ... - STALL - STALL - STALL - STALL - - ldq_p s0, PCB_Q_PTBR(a5) - sll s0, VA_S_OFF, s0 // Shift PTBR into position - STALL // don't dual issue the load with mtpr -pb - mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1 - STALL // don't dual issue the load with mtpr -pb - ldq_p sp, PCB_Q_KSP(a5) - - //mtpr a0, excAddr // Load the dispatch address. - //STALL // don't dual issue the load with mtpr -pb - //bis a3, zero, a0 // first free PFN - // ldq_p a1, PCB_Q_PTBR(a5) // ptbr - - //ldq_p a2, 24(zero) // argc - //ldq_p a3, 32(zero) // argv - //ldq_p a4, 40(zero) // environ - //lda a5, 0(zero) // osf_param - //STALL // don't dual issue the load with mtpr -pb - mtpr zero, dtbIa // Flush all D-stream TB entries - mtpr zero, itbIa // Flush all I-stream TB entries - - - mtpr a1, excAddr // Load the dispatch address. - - STALL // don't dual issue the load with mtpr -pb - STALL // don't dual issue the load with mtpr -pb - mtpr zero, dtbIa // Flush all D-stream TB entries - mtpr zero, itbIa // Flush all I-stream TB entries - br zero, 2f - - ALIGN_BLOCK - -2: NOP - mtpr zero, icFlush // Flush the icache. - NOP - NOP - - NOP // Required NOPs ... 1-10 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - NOP // Required NOPs ... 11-20 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - NOP // Required NOPs ... 21-30 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - NOP // Required NOPs ... 31-40 - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - - - - NOP // Required NOPs ... 41-44 - NOP - NOP - NOP - - hw_rei_stall // Dispatch to kernel - -- cgit v1.2.3