From 6fc0094337bc0356c55232c3850fb5fd2dab1f0c Mon Sep 17 00:00:00 2001 From: Mrinmoy Ghosh Date: Tue, 25 Sep 2012 11:49:41 -0500 Subject: Cache: add a response latency to the caches In the current caches the hit latency is paid twice on a miss. This patch lets a configurable response latency be set of the cache for the backward path. --- tests/configs/memtest.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'tests/configs/memtest.py') diff --git a/tests/configs/memtest.py b/tests/configs/memtest.py index 57f45b1d4..f91a7eb78 100644 --- a/tests/configs/memtest.py +++ b/tests/configs/memtest.py @@ -34,7 +34,8 @@ from m5.objects import * # ==================== class L1(BaseCache): - latency = '1ns' + hit_latency = '1ns' + response_latency = '1ns' block_size = 64 mshrs = 12 tgts_per_mshr = 8 @@ -46,7 +47,8 @@ class L1(BaseCache): class L2(BaseCache): block_size = 64 - latency = '10ns' + hit_latency = '10ns' + response_latency = '10ns' mshrs = 92 tgts_per_mshr = 16 write_buffers = 8 -- cgit v1.2.3