From eaa994e7f6c12f6dc3e17836052f76a5ce9bdc01 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 9 Mar 2012 09:59:25 -0500 Subject: cache: Allow main memory to be at disjoint address ranges. --- tests/configs/pc-o3-timing.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'tests/configs/pc-o3-timing.py') diff --git a/tests/configs/pc-o3-timing.py b/tests/configs/pc-o3-timing.py index f35812085..0b8b9381f 100644 --- a/tests/configs/pc-o3-timing.py +++ b/tests/configs/pc-o3-timing.py @@ -77,7 +77,7 @@ class IOCache(BaseCache): mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range = AddrRange(0, size=mem_size) + addr_ranges = [AddrRange(0, size=mem_size)] forward_snoops = False #cpu @@ -86,7 +86,7 @@ cpu = DerivO3CPU(cpu_id=0) mdesc = SysConfig(disk = 'linux-x86.img') system = FSConfig.makeLinuxX86System('timing', mdesc=mdesc) system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9') -system.iocache = IOCache(addr_range=mem_size) +system.iocache = IOCache() system.iocache.cpu_side = system.iobus.master system.iocache.mem_side = system.membus.slave -- cgit v1.2.3