From ca0fd665dcf6a4aeda07955d3898b03204c88fd8 Mon Sep 17 00:00:00 2001
From: Wendy Elsasser <wendy.elsasser@arm.com>
Date: Tue, 14 Feb 2017 15:09:18 -0600
Subject: mem: Update DRAM configuration names

Names of DRAM configurations were updated to reflect both
the channel and device data width.

Previous naming format was:
	<DEVICE_TYPE>_<DATA_RATE>_<CHANNEL_WIDTH>

The following nomenclature is now used:
	<DEVICE_TYPE>_<DATA_RATE>_<n>x<w>
where n = The number of devices per rank on the channel
      x = Device width

Total channel width can be calculated by n*w

Example:
A 64-bit DDR4, 2400 channel consisting of 4-bit devices:
	n = 16
	w = 4
The resulting configuration name is:
	DDR4_2400_16x4

Updated scripts to match new naming convention.

Added unique configurations for DDR4 for:
1) 16x4
2) 8x8
3) 4x16

Change-Id: Ibd7f763b7248835c624309143cb9fc29d56a69d1
Reviewed-by: Radhika Jagtap <radhika.jagtap@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
---
 tests/configs/realview-o3-dual.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'tests/configs/realview-o3-dual.py')

diff --git a/tests/configs/realview-o3-dual.py b/tests/configs/realview-o3-dual.py
index 9dff95ac7..f2042cd4e 100644
--- a/tests/configs/realview-o3-dual.py
+++ b/tests/configs/realview-o3-dual.py
@@ -40,6 +40,6 @@ from arm_generic import *
 from common.O3_ARM_v7a import O3_ARM_v7a_3
 
 root = LinuxArmFSSystem(mem_mode='timing',
-                        mem_class=DDR3_1600_x64,
+                        mem_class=DDR3_1600_8x8,
                         cpu_class=O3_ARM_v7a_3,
                         num_cpus=2).create_root()
-- 
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