From b5cc4c760478240bf8c5f7de977bf2b56fd8dfd4 Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Thu, 20 Mar 2014 09:14:14 -0500 Subject: config: ruby: rename _cpu_ruby_ports to _cpu_ports --- tests/configs/simple-timing-mp-ruby.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'tests/configs/simple-timing-mp-ruby.py') diff --git a/tests/configs/simple-timing-mp-ruby.py b/tests/configs/simple-timing-mp-ruby.py index 835428c3b..f7dfb5c5c 100644 --- a/tests/configs/simple-timing-mp-ruby.py +++ b/tests/configs/simple-timing-mp-ruby.py @@ -83,7 +83,7 @@ Ruby.create_system(options, system) # Create a separate clock domain for Ruby system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock) -assert(options.num_cpus == len(system.ruby._cpu_ruby_ports)) +assert(options.num_cpus == len(system.ruby._cpu_ports)) for (i, cpu) in enumerate(system.cpu): # create the interrupt controller @@ -92,7 +92,7 @@ for (i, cpu) in enumerate(system.cpu): # # Tie the cpu ports to the ruby cpu ports # - cpu.connectAllPorts(system.ruby._cpu_ruby_ports[i]) + cpu.connectAllPorts(system.ruby._cpu_ports[i]) # ----------------------- # run simulation -- cgit v1.2.3