From 89ea32325094665c16688212b5a2cd7b7bbf5f03 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Mon, 16 Feb 2009 12:09:45 -0500 Subject: Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway. --- .../ref/alpha/linux/tsunami-o3-dual/config.ini | 34 +++++++----- .../ref/alpha/linux/tsunami-o3-dual/simerr | 6 ++- .../ref/alpha/linux/tsunami-o3-dual/simout | 10 ++-- .../ref/alpha/linux/tsunami-o3-dual/stats.txt | 62 ++-------------------- .../ref/alpha/linux/tsunami-o3/config.ini | 27 +++++++--- .../ref/alpha/linux/tsunami-o3/simerr | 5 +- .../ref/alpha/linux/tsunami-o3/simout | 10 ++-- .../ref/alpha/linux/tsunami-o3/stats.txt | 44 ++------------- 8 files changed, 66 insertions(+), 132 deletions(-) (limited to 'tests/long/10.linux-boot') diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini index e35ca8bb4..cd4931e34 100644 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini @@ -46,6 +46,7 @@ SSITSize=1024 activity=0 backComSize=5 cachePorts=200 +checker=Null choiceCtrBits=2 choicePredictorSize=8192 clock=500 @@ -135,12 +136,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -309,12 +309,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -354,6 +353,7 @@ SSITSize=1024 activity=0 backComSize=5 cachePorts=200 +checker=Null choiceCtrBits=2 choicePredictorSize=8192 clock=500 @@ -443,12 +443,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -617,12 +616,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -660,6 +658,7 @@ image=system.disk0.image type=CowDiskImage children=child child=system.disk0.image.child +image_file= read_only=false table_size=65536 @@ -679,6 +678,7 @@ image=system.disk2.image type=CowDiskImage children=child child=system.disk2.image.child +image_file= read_only=false table_size=65536 @@ -713,12 +713,11 @@ latency=50000 max_miss_count=0 mem_side_filter_ranges=0:18446744073709551615 mshrs=20 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=500000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -746,12 +745,11 @@ latency=10000 max_miss_count=0 mem_side_filter_ranges= mshrs=92 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=100000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -881,16 +879,22 @@ pio=system.iobus.port[1] [system.tsunami.ethernet] type=NSGigE BAR0=1 +BAR0LegacyIO=false BAR0Size=256 BAR1=0 +BAR1LegacyIO=false BAR1Size=4096 BAR2=0 +BAR2LegacyIO=false BAR2Size=0 BAR3=0 +BAR3LegacyIO=false BAR3Size=0 BAR4=0 +BAR4LegacyIO=false BAR4Size=0 BAR5=0 +BAR5LegacyIO=false BAR5Size=0 BIST=0 CacheLineSize=0 @@ -1259,16 +1263,22 @@ pio=system.iobus.port[22] [system.tsunami.ide] type=IdeController BAR0=1 +BAR0LegacyIO=false BAR0Size=8 BAR1=1 +BAR1LegacyIO=false BAR1Size=4 BAR2=1 +BAR2LegacyIO=false BAR2Size=8 BAR3=1 +BAR3LegacyIO=false BAR3Size=4 BAR4=1 +BAR4LegacyIO=false BAR4Size=16 BAR5=1 +BAR5LegacyIO=false BAR5Size=0 BIST=0 CacheLineSize=0 diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr index 4cafe060d..f51a48835 100755 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr @@ -1,5 +1,7 @@ -warn: kernel located at: /dist/m5/system/binaries/vmlinux warn: Sockets disabled, not accepting terminal connections +For more information see: http://www.m5sim.org/warn/8742226b warn: Sockets disabled, not accepting gdb connections +For more information see: http://www.m5sim.org/warn/d946bea6 warn: 125740500: Trying to launch CPU number 1! -warn: be nice to actually delete the event here +For more information see: http://www.m5sim.org/warn/8f7d2563 +hack: be nice to actually delete the event here diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout index cd7d66c16..1910760d1 100755 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout @@ -5,12 +5,12 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Dec 14 2008 21:47:07 -M5 revision 5776:07905796d7bea4187139808b7de687a99cbc3141 -M5 commit date Sun Dec 14 21:45:15 2008 -0800 -M5 started Dec 14 2008 21:47:53 -M5 executing on tater +M5 compiled Feb 16 2009 00:15:24 +M5 revision d8c62c2eaaa6 5874 default qtip pf1 tip qbase +M5 started Feb 16 2009 00:44:44 +M5 executing on zizzer command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/long/10.linux-boot/alpha/linux/tsunami-o3-dual -re tests/run.py long/10.linux-boot/alpha/linux/tsunami-o3-dual Global frequency set at 1000000000000 ticks per second +info: kernel located at: /dist/m5/system/binaries/vmlinux info: Entering event queue @ 0. Starting simulation... Exiting @ tick 1907705384500 because m5_exit instruction encountered diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt index 6cd8fa945..dcbc52710 100644 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt @@ -16,10 +16,10 @@ global.BPredUnit.lookups 10093436 # Nu global.BPredUnit.lookups 5538388 # Number of BP lookups global.BPredUnit.usedRAS 690374 # Number of times the RAS was used to get a target. global.BPredUnit.usedRAS 417429 # Number of times the RAS was used to get a target. -host_inst_rate 132487 # Simulator instruction rate (inst/s) -host_mem_usage 294244 # Number of bytes of host memory used -host_seconds 424.12 # Real time elapsed on the host -host_tick_rate 4498020766 # Simulator tick rate (ticks/s) +host_inst_rate 133092 # Simulator instruction rate (inst/s) +host_mem_usage 294856 # Number of bytes of host memory used +host_seconds 422.19 # Real time elapsed on the host +host_tick_rate 4518571306 # Simulator tick rate (ticks/s) memdepunit.memDep.conflictingLoads 2050532 # Number of conflicting loads. memdepunit.memDep.conflictingLoads 906322 # Number of conflicting loads. memdepunit.memDep.conflictingStores 1832540 # Number of conflicting stores. @@ -146,15 +146,6 @@ system.cpu0.dcache.overall_mshr_miss_rate 0.091715 # m system.cpu0.dcache.overall_mshr_misses 978850 # number of overall MSHR misses system.cpu0.dcache.overall_mshr_uncacheable_latency 1690648997 # number of overall MSHR uncacheable cycles system.cpu0.dcache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.cpu0.dcache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.cpu0.dcache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.cpu0.dcache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.cpu0.dcache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.cpu0.dcache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.cpu0.dcache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.cpu0.dcache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.cpu0.dcache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.cpu0.dcache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.cpu0.dcache.replacements 922726 # number of replacements system.cpu0.dcache.sampled_refs 923123 # Sample count of references to valid blocks. system.cpu0.dcache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -256,15 +247,6 @@ system.cpu0.icache.overall_mshr_miss_rate 0.096077 # m system.cpu0.icache.overall_mshr_misses 620366 # number of overall MSHR misses system.cpu0.icache.overall_mshr_uncacheable_latency 0 # number of overall MSHR uncacheable cycles system.cpu0.icache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.cpu0.icache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.cpu0.icache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.cpu0.icache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.cpu0.icache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.cpu0.icache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.cpu0.icache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.cpu0.icache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.cpu0.icache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.cpu0.icache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.cpu0.icache.replacements 619753 # number of replacements system.cpu0.icache.sampled_refs 620265 # Sample count of references to valid blocks. system.cpu0.icache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -600,15 +582,6 @@ system.cpu1.dcache.overall_mshr_miss_rate 0.098495 # m system.cpu1.dcache.overall_mshr_misses 573673 # number of overall MSHR misses system.cpu1.dcache.overall_mshr_uncacheable_latency 824622000 # number of overall MSHR uncacheable cycles system.cpu1.dcache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.cpu1.dcache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.cpu1.dcache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.cpu1.dcache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.cpu1.dcache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.cpu1.dcache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.cpu1.dcache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.cpu1.dcache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.cpu1.dcache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.cpu1.dcache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.cpu1.dcache.replacements 531784 # number of replacements system.cpu1.dcache.sampled_refs 532296 # Sample count of references to valid blocks. system.cpu1.dcache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -710,15 +683,6 @@ system.cpu1.icache.overall_mshr_miss_rate 0.144757 # m system.cpu1.icache.overall_mshr_misses 447169 # number of overall MSHR misses system.cpu1.icache.overall_mshr_uncacheable_latency 0 # number of overall MSHR uncacheable cycles system.cpu1.icache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.cpu1.icache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.cpu1.icache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.cpu1.icache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.cpu1.icache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.cpu1.icache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.cpu1.icache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.cpu1.icache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.cpu1.icache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.cpu1.icache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.cpu1.icache.replacements 446606 # number of replacements system.cpu1.icache.sampled_refs 447117 # Sample count of references to valid blocks. system.cpu1.icache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -985,15 +949,6 @@ system.iocache.overall_mshr_miss_rate 1 # ms system.iocache.overall_mshr_misses 41727 # number of overall MSHR misses system.iocache.overall_mshr_uncacheable_latency 0 # number of overall MSHR uncacheable cycles system.iocache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.iocache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.iocache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.iocache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.iocache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.iocache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.iocache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.iocache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.iocache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.iocache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.iocache.replacements 41697 # number of replacements system.iocache.sampled_refs 41713 # Sample count of references to valid blocks. system.iocache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -1072,15 +1027,6 @@ system.l2c.overall_mshr_miss_rate 0.248969 # ms system.l2c.overall_mshr_misses 627840 # number of overall MSHR misses system.l2c.overall_mshr_uncacheable_latency 2264236498 # number of overall MSHR uncacheable cycles system.l2c.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.l2c.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.l2c.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.l2c.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.l2c.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.l2c.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.l2c.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.l2c.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.l2c.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.l2c.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.l2c.replacements 402142 # number of replacements system.l2c.sampled_refs 433669 # Sample count of references to valid blocks. system.l2c.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini index 1ce4a49e9..c7a30cef6 100644 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini @@ -46,6 +46,7 @@ SSITSize=1024 activity=0 backComSize=5 cachePorts=200 +checker=Null choiceCtrBits=2 choicePredictorSize=8192 clock=500 @@ -135,12 +136,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -309,12 +309,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -352,6 +351,7 @@ image=system.disk0.image type=CowDiskImage children=child child=system.disk0.image.child +image_file= read_only=false table_size=65536 @@ -371,6 +371,7 @@ image=system.disk2.image type=CowDiskImage children=child child=system.disk2.image.child +image_file= read_only=false table_size=65536 @@ -405,12 +406,11 @@ latency=50000 max_miss_count=0 mem_side_filter_ranges=0:18446744073709551615 mshrs=20 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=500000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -438,12 +438,11 @@ latency=10000 max_miss_count=0 mem_side_filter_ranges= mshrs=92 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=100000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -573,16 +572,22 @@ pio=system.iobus.port[1] [system.tsunami.ethernet] type=NSGigE BAR0=1 +BAR0LegacyIO=false BAR0Size=256 BAR1=0 +BAR1LegacyIO=false BAR1Size=4096 BAR2=0 +BAR2LegacyIO=false BAR2Size=0 BAR3=0 +BAR3LegacyIO=false BAR3Size=0 BAR4=0 +BAR4LegacyIO=false BAR4Size=0 BAR5=0 +BAR5LegacyIO=false BAR5Size=0 BIST=0 CacheLineSize=0 @@ -951,16 +956,22 @@ pio=system.iobus.port[22] [system.tsunami.ide] type=IdeController BAR0=1 +BAR0LegacyIO=false BAR0Size=8 BAR1=1 +BAR1LegacyIO=false BAR1Size=4 BAR2=1 +BAR2LegacyIO=false BAR2Size=8 BAR3=1 +BAR3LegacyIO=false BAR3Size=4 BAR4=1 +BAR4LegacyIO=false BAR4Size=16 BAR5=1 +BAR5LegacyIO=false BAR5Size=0 BIST=0 CacheLineSize=0 diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr index 1a557daf8..83c71fc5c 100755 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr @@ -1,4 +1,5 @@ -warn: kernel located at: /dist/m5/system/binaries/vmlinux warn: Sockets disabled, not accepting terminal connections +For more information see: http://www.m5sim.org/warn/8742226b warn: Sockets disabled, not accepting gdb connections -warn: be nice to actually delete the event here +For more information see: http://www.m5sim.org/warn/d946bea6 +hack: be nice to actually delete the event here diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout index c0c3673fc..c6712a23b 100755 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout @@ -5,12 +5,12 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Dec 14 2008 21:47:07 -M5 revision 5776:07905796d7bea4187139808b7de687a99cbc3141 -M5 commit date Sun Dec 14 21:45:15 2008 -0800 -M5 started Dec 14 2008 21:47:52 -M5 executing on tater +M5 compiled Feb 16 2009 00:15:24 +M5 revision d8c62c2eaaa6 5874 default qtip pf1 tip qbase +M5 started Feb 16 2009 00:42:11 +M5 executing on zizzer command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/long/10.linux-boot/alpha/linux/tsunami-o3 -re tests/run.py long/10.linux-boot/alpha/linux/tsunami-o3 Global frequency set at 1000000000000 ticks per second +info: kernel located at: /dist/m5/system/binaries/vmlinux info: Entering event queue @ 0. Starting simulation... Exiting @ tick 1867363148500 because m5_exit instruction encountered diff --git a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt index d70f58b89..37990c73f 100644 --- a/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt +++ b/tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt @@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect 828629 # Nu global.BPredUnit.condPredicted 12132448 # Number of conditional branches predicted global.BPredUnit.lookups 14570242 # Number of BP lookups global.BPredUnit.usedRAS 1034900 # Number of times the RAS was used to get a target. -host_inst_rate 133323 # Simulator instruction rate (inst/s) -host_mem_usage 292856 # Number of bytes of host memory used -host_seconds 398.21 # Real time elapsed on the host -host_tick_rate 4689394624 # Simulator tick rate (ticks/s) +host_inst_rate 209657 # Simulator instruction rate (inst/s) +host_mem_usage 292968 # Number of bytes of host memory used +host_seconds 253.23 # Real time elapsed on the host +host_tick_rate 7374290880 # Simulator tick rate (ticks/s) memdepunit.memDep.conflictingLoads 3083644 # Number of conflicting loads. memdepunit.memDep.conflictingStores 2877472 # Number of conflicting stores. memdepunit.memDep.insertedLoads 11055097 # Number of loads inserted to the mem dependence unit. @@ -134,15 +134,6 @@ system.cpu.dcache.overall_mshr_miss_rate 0.095592 # ms system.cpu.dcache.overall_mshr_misses 1481642 # number of overall MSHR misses system.cpu.dcache.overall_mshr_uncacheable_latency 2140398497 # number of overall MSHR uncacheable cycles system.cpu.dcache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.cpu.dcache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.cpu.dcache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.cpu.dcache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.cpu.dcache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.cpu.dcache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.cpu.dcache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.cpu.dcache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.cpu.dcache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.cpu.dcache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.cpu.dcache.replacements 1401991 # number of replacements system.cpu.dcache.sampled_refs 1402503 # Sample count of references to valid blocks. system.cpu.dcache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -244,15 +235,6 @@ system.cpu.icache.overall_mshr_miss_rate 0.110520 # ms system.cpu.icache.overall_mshr_misses 995547 # number of overall MSHR misses system.cpu.icache.overall_mshr_uncacheable_latency 0 # number of overall MSHR uncacheable cycles system.cpu.icache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.cpu.icache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.cpu.icache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.cpu.icache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.cpu.icache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.cpu.icache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.cpu.icache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.cpu.icache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.cpu.icache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.cpu.icache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.cpu.icache.replacements 994847 # number of replacements system.cpu.icache.sampled_refs 995358 # Sample count of references to valid blocks. system.cpu.icache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -536,15 +518,6 @@ system.iocache.overall_mshr_miss_rate 1 # ms system.iocache.overall_mshr_misses 41725 # number of overall MSHR misses system.iocache.overall_mshr_uncacheable_latency 0 # number of overall MSHR uncacheable cycles system.iocache.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.iocache.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.iocache.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.iocache.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.iocache.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.iocache.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.iocache.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.iocache.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.iocache.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.iocache.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.iocache.replacements 41685 # number of replacements system.iocache.sampled_refs 41701 # Sample count of references to valid blocks. system.iocache.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions @@ -623,15 +596,6 @@ system.l2c.overall_mshr_miss_rate 0.255051 # ms system.l2c.overall_mshr_misses 611608 # number of overall MSHR misses system.l2c.overall_mshr_uncacheable_latency 1926369498 # number of overall MSHR uncacheable cycles system.l2c.overall_mshr_uncacheable_misses 0 # number of overall MSHR uncacheable misses -system.l2c.prefetcher.num_hwpf_already_in_cache 0 # number of hwpf that were already in the cache -system.l2c.prefetcher.num_hwpf_already_in_mshr 0 # number of hwpf that were already in mshr -system.l2c.prefetcher.num_hwpf_already_in_prefetcher 0 # number of hwpf that were already in the prefetch queue -system.l2c.prefetcher.num_hwpf_evicted 0 # number of hwpf removed due to no buffer left -system.l2c.prefetcher.num_hwpf_identified 0 # number of hwpf identified -system.l2c.prefetcher.num_hwpf_issued 0 # number of hwpf issued -system.l2c.prefetcher.num_hwpf_removed_MSHR_hit 0 # number of hwpf removed because MSHR allocated -system.l2c.prefetcher.num_hwpf_span_page 0 # number of hwpf spanning a virtual page -system.l2c.prefetcher.num_hwpf_squashed_from_miss 0 # number of hwpf that got squashed due to a miss aborting calculation time system.l2c.replacements 396031 # number of replacements system.l2c.sampled_refs 427707 # Sample count of references to valid blocks. system.l2c.soft_prefetch_mshr_full 0 # number of mshr full events for SW prefetching instrutions -- cgit v1.2.3