From 0cf36d94095aedef3c51447243c5a3cc14dd5d56 Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <steve.reinhardt@amd.com>
Date: Wed, 22 Apr 2015 20:22:29 -0700
Subject: stats: update for previous changeset

Very small differences in IQ-specific O3 stats.
---
 .../ref/arm/linux/realview64-o3-checker/config.ini | 64 ++++++++++++----------
 1 file changed, 36 insertions(+), 28 deletions(-)

(limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini')

diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini
index a07bdbdd3..4d2b2f309 100644
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini
@@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000
 type=LinuxArmSystem
 children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
 atags_addr=134217728
-boot_loader=/projects/pd/randd/dist/binaries/boot_emm.arm64
+boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm64
 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
 boot_release_addr=65528
 cache_line_size=64
 clk_domain=system.clk_domain
-dtb_filename=/projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb
+dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb
 early_kernel_symbols=false
 enable_context_switch_stats_dump=false
 eventq_index=0
@@ -30,20 +30,21 @@ have_security=false
 have_virtualization=false
 highest_el_is_64=false
 init_param=0
-kernel=/projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821
+kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821
 kernel_addr_check=true
 load_addr_mask=268435455
 load_offset=2147483648
 machine_type=VExpress_EMM64
 mem_mode=timing
 mem_ranges=2147483648:2415919103
-memories=system.realview.vram system.physmem system.realview.nvmem
+memories=system.physmem system.realview.nvmem system.realview.vram
+mmap_using_noreserve=false
 multi_proc=true
 num_work_ids=16
 panic_on_oops=true
 panic_on_panic=true
 phys_addr_range_64=40
-readfile=/work/gem5.latest/tests/halt.sh
+readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
 reset_addr_64=0
 symbolfile=
 work_begin_ckpt_count=0
@@ -86,7 +87,7 @@ table_size=65536
 [system.cf0.image.child]
 type=RawDiskImage
 eventq_index=0
-image_file=/projects/pd/randd/dist/disks/linaro-minimal-aarch64.img
+image_file=/home/stever/m5/aarch-system-2014-10/disks/linaro-minimal-aarch64.img
 read_only=true
 
 [system.clk_domain]
@@ -189,7 +190,7 @@ dcache_port=system.cpu.dcache.cpu_side
 icache_port=system.cpu.icache.cpu_side
 
 [system.cpu.branchPred]
-type=BranchPredictor
+type=BiModeBP
 BTBEntries=2048
 BTBTagSize=18
 RASSize=16
@@ -199,11 +200,7 @@ eventq_index=0
 globalCtrBits=2
 globalPredictorSize=8192
 instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
 numThreads=1
-predType=bi-mode
 
 [system.cpu.checker]
 type=O3Checker
@@ -245,6 +242,7 @@ type=ArmStage2MMU
 children=stage2_tlb
 eventq_index=0
 stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb
+sys=system
 tlb=system.cpu.checker.dtb
 
 [system.cpu.checker.dstage2_mmu.stage2_tlb]
@@ -262,7 +260,6 @@ eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[9]
 
 [system.cpu.checker.dtb]
 type=ArmTLB
@@ -279,7 +276,7 @@ eventq_index=0
 is_stage2=false
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[7]
+port=system.cpu.toL2Bus.slave[5]
 
 [system.cpu.checker.isa]
 type=ArmISA
@@ -316,6 +313,7 @@ type=ArmStage2MMU
 children=stage2_tlb
 eventq_index=0
 stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb
+sys=system
 tlb=system.cpu.checker.itb
 
 [system.cpu.checker.istage2_mmu.stage2_tlb]
@@ -333,7 +331,6 @@ eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[8]
 
 [system.cpu.checker.itb]
 type=ArmTLB
@@ -350,7 +347,7 @@ eventq_index=0
 is_stage2=false
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[6]
+port=system.cpu.toL2Bus.slave[4]
 
 [system.cpu.checker.tracer]
 type=ExeTracer
@@ -362,6 +359,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
 clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=2
@@ -396,6 +394,7 @@ type=ArmStage2MMU
 children=stage2_tlb
 eventq_index=0
 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
+sys=system
 tlb=system.cpu.dtb
 
 [system.cpu.dstage2_mmu.stage2_tlb]
@@ -413,7 +412,6 @@ eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[5]
 
 [system.cpu.dtb]
 type=ArmTLB
@@ -703,6 +701,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
 clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=2
@@ -771,6 +770,7 @@ type=ArmStage2MMU
 children=stage2_tlb
 eventq_index=0
 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
+sys=system
 tlb=system.cpu.itb
 
 [system.cpu.istage2_mmu.stage2_tlb]
@@ -788,7 +788,6 @@ eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[4]
 
 [system.cpu.itb]
 type=ArmTLB
@@ -813,6 +812,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
 clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=20
@@ -846,13 +846,16 @@ size=4194304
 type=CoherentXBar
 clk_domain=system.cpu_clk_domain
 eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
 snoop_filter=Null
+snoop_response_latency=1
 system=system
 use_default_range=false
 width=32
 master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port system.cpu.checker.istage2_mmu.stage2_tlb.walker.port system.cpu.checker.dstage2_mmu.stage2_tlb.walker.port
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port
 
 [system.cpu.tracer]
 type=ExeTracer
@@ -883,9 +886,11 @@ sys=system
 type=NoncoherentXBar
 clk_domain=system.clk_domain
 eventq_index=0
-header_cycles=1
+forward_latency=1
+frontend_latency=2
+response_latency=2
 use_default_range=true
-width=8
+width=16
 default=system.realview.pciconfig.pio
 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
@@ -896,6 +901,7 @@ children=tags
 addr_ranges=2147483648:2415919103
 assoc=8
 clk_domain=system.clk_domain
+demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=false
 hit_latency=50
@@ -930,13 +936,16 @@ type=CoherentXBar
 children=badaddr_responder
 clk_domain=system.clk_domain
 eventq_index=0
-header_cycles=1
+forward_latency=4
+frontend_latency=3
+response_latency=2
 snoop_filter=Null
+snoop_response_latency=4
 system=system
 use_default_range=false
-width=8
+width=16
 default=system.membus.badaddr_responder.pio
-master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
+master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
 slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
 
 [system.membus.badaddr_responder]
@@ -984,7 +993,7 @@ IDD62=0.000000
 VDD=1.500000
 VDD2=0.000000
 activation_limit=4
-addr_mapping=RoRaBaChCo
+addr_mapping=RoRaBaCoCh
 bank_groups_per_rank=0
 banks_per_rank=8
 burst_length=8
@@ -1288,7 +1297,6 @@ dist_pio_delay=10000
 eventq_index=0
 int_latency=10000
 it_lines=128
-msix_addr=0
 platform=system.realview
 system=system
 pio=system.membus.master[2]
@@ -1475,7 +1483,7 @@ int_num_watchdog=30
 pio_addr=738721792
 pio_latency=100000
 system=system
-pio=system.membus.master[3]
+pio=system.membus.master[4]
 
 [system.realview.mmc_fake]
 type=AmbaFake
@@ -1657,7 +1665,7 @@ platform=system.realview
 ppint=25
 system=system
 vcpu_addr=738222080
-pio=system.membus.master[4]
+pio=system.membus.master[3]
 
 [system.realview.vram]
 type=SimpleMemory
-- 
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