From 29cd50e14e0709c28200bcbdbc08c1093ba300d7 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Wed, 29 Oct 2014 23:50:15 -0500 Subject: arm, tests: Add 64-bit ARM regression tests --- .../ref/arm/linux/realview64-o3-checker/simout | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout') diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout new file mode 100644 index 000000000..4029bb1c2 --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout @@ -0,0 +1,17 @@ +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Oct 29 2014 09:18:22 +gem5 started Oct 29 2014 10:38:57 +gem5 executing on u200540-lin +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker +Selected 64-bit ARM architecture, updating default disk image... +Global frequency set at 1000000000000 ticks per second +info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 + 0: system.cpu.checker.isa: ISA system set to: 0x48ecb00 0x48ecb00 + 0: system.cpu.isa: ISA system set to: 0x48ecb00 0x48ecb00 +info: Using bootloader at address 0x10 +info: Using kernel entry physical address at 0x80080000 +info: Loading DTB file: /projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 +info: Entering event queue @ 0. Starting simulation... +Exiting @ tick 51557114994500 because m5_exit instruction encountered -- cgit v1.2.3