From 4a644767c58754339965cecc5d85853255652a30 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 9 May 2012 11:52:14 -0700 Subject: stats: update stats for no_value -> nan Lots of accumulated older changes too. --- .../long/se/00.gzip/ref/arm/linux/o3-timing/config.ini | 9 +++++---- tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout | 8 ++++---- .../long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt | 18 +++++++++--------- 3 files changed, 18 insertions(+), 17 deletions(-) (limited to 'tests/long/se/00.gzip/ref/arm/linux/o3-timing') diff --git a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini index 043132ebd..d2c692362 100644 --- a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini @@ -16,7 +16,6 @@ load_addr_mask=1099511627775 mem_mode=atomic memories=system.physmem num_work_ids=16 -physmem=system.physmem readfile= symbolfile= work_begin_ckpt_count=0 @@ -509,12 +508,12 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=gzip input.log 1 -cwd=build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing +cwd=build/ARM/tests/opt/long/se/00.gzip/arm/linux/o3-timing egid=100 env= errout=cerr euid=100 -executable=/projects/pd/randd/dist/cpu2000/binaries/arm/linux/gzip +executable=/dist/m5/cpu2000/binaries/arm/linux/gzip gid=100 input=cin max_stack_size=67108864 @@ -537,8 +536,10 @@ master=system.physmem.port[0] slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] -type=PhysicalMemory +type=SimpleMemory +conf_table_reported=false file= +in_addr_map=true latency=30000 latency_var=0 null=false diff --git a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout index 35fcd0232..6445e3ddc 100755 --- a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout @@ -1,10 +1,10 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Mar 17 2012 11:46:05 -gem5 started Mar 17 2012 16:38:16 -gem5 executing on u200540-lin -command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing +gem5 compiled May 8 2012 15:17:37 +gem5 started May 8 2012 16:20:58 +gem5 executing on piton +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/00.gzip/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/00.gzip/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... spec_init diff --git a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt index 8bc0cbb1b..54f7feb76 100644 --- a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.164248 # Nu sim_ticks 164248292500 # Number of ticks simulated final_tick 164248292500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 250614 # Simulator instruction rate (inst/s) -host_op_rate 264817 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 72208895 # Simulator tick rate (ticks/s) -host_mem_usage 224524 # Number of bytes of host memory used -host_seconds 2274.63 # Real time elapsed on the host +host_inst_rate 95192 # Simulator instruction rate (inst/s) +host_op_rate 100587 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 27427613 # Simulator tick rate (ticks/s) +host_mem_usage 231504 # Number of bytes of host memory used +host_seconds 5988.43 # Real time elapsed on the host sim_insts 570052728 # Number of instructions simulated sim_ops 602360935 # Number of ops (including micro ops) simulated system.physmem.bytes_read 5850432 # Number of bytes read from this memory @@ -377,8 +377,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 # system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed system.cpu.icache.ReadReq_mshr_hits::cpu.inst 310 # number of ReadReq MSHR hits @@ -474,7 +474,7 @@ system.cpu.dcache.blocked_cycles::no_targets 0 system.cpu.dcache.blocked::no_mshrs 2180 # number of cycles access was blocked system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked system.cpu.dcache.avg_blocked_cycles::no_mshrs 4389.455963 # average number of cycles each access was blocked -system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # number of cache copies performed system.cpu.dcache.writebacks::writebacks 394908 # number of writebacks @@ -601,7 +601,7 @@ system.cpu.l2cache.blocked_cycles::no_targets 0 system.cpu.l2cache.blocked::no_mshrs 332 # number of cycles access was blocked system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked system.cpu.l2cache.avg_blocked_cycles::no_mshrs 6039.156627 # average number of cycles each access was blocked -system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.l2cache.fast_writes 0 # number of fast writes performed system.cpu.l2cache.cache_copies 0 # number of cache copies performed system.cpu.l2cache.writebacks::writebacks 58158 # number of writebacks -- cgit v1.2.3