From 57e5401d954d46fea45ca3eaafa8ae655659da39 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Fri, 9 May 2014 18:58:50 -0400 Subject: stats: Bump stats for the fixes, and mostly DRAM controller changes --- .../10.mcf/ref/arm/linux/simple-timing/stats.txt | 45 +++++++++++++++++++--- 1 file changed, 40 insertions(+), 5 deletions(-) (limited to 'tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt') diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt index c88119d29..a84dd1567 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.147136 # Nu sim_ticks 147135976000 # Number of ticks simulated final_tick 147135976000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1098833 # Simulator instruction rate (inst/s) -host_op_rate 1106711 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1784978875 # Simulator tick rate (ticks/s) -host_mem_usage 400800 # Number of bytes of host memory used -host_seconds 82.43 # Real time elapsed on the host +host_inst_rate 805246 # Simulator instruction rate (inst/s) +host_op_rate 811020 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1308067541 # Simulator tick rate (ticks/s) +host_mem_usage 443480 # Number of bytes of host memory used +host_seconds 112.48 # Real time elapsed on the host sim_insts 90576861 # Number of instructions simulated sim_ops 91226312 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -153,6 +153,41 @@ system.cpu.num_busy_cycles 294271952 # Nu system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 18732304 # Number of branches fetched +system.cpu.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction +system.cpu.op_class::IntAlu 63924095 70.05% 70.05% # Class of executed instruction +system.cpu.op_class::IntMult 10474 0.01% 70.06% # Class of executed instruction +system.cpu.op_class::IntDiv 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::FloatAdd 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::FloatCmp 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::FloatCvt 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::FloatMult 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::FloatDiv 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 6 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 15 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 2 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 70.06% # Class of executed instruction +system.cpu.op_class::MemRead 22573966 24.74% 94.80% # Class of executed instruction +system.cpu.op_class::MemWrite 4744844 5.20% 100.00% # Class of executed instruction +system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::total 91253402 # Class of executed instruction system.cpu.icache.tags.replacements 2 # number of replacements system.cpu.icache.tags.tagsinuse 510.071144 # Cycle average of tags in use system.cpu.icache.tags.total_refs 107830172 # Total number of references to valid blocks. -- cgit v1.2.3