From 53a05978054ac9bb718e419a48371bd10c720267 Mon Sep 17 00:00:00 2001
From: Nilay Vaish <nilay@cs.wisc.edu>
Date: Mon, 11 Mar 2013 17:45:09 -0500
Subject: regressions: x86: stats updates due to new x87 insts

---
 .../se/20.parser/ref/x86/linux/o3-timing/config.ini | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

(limited to 'tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini')

diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini b/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini
index ab5e0012f..448cff052 100644
--- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini
+++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini
@@ -452,7 +452,7 @@ mem_side=system.cpu.toL2Bus.slave[0]
 
 [system.cpu.interrupts]
 type=X86LocalApic
-clock=500
+clock=8000
 int_latency=1000
 pio_addr=2305843009213693952
 pio_latency=100000
@@ -503,6 +503,7 @@ type=CoherentBus
 block_size=64
 clock=500
 header_cycles=1
+system=system
 use_default_range=false
 width=32
 master=system.cpu.l2cache.cpu_side
@@ -535,6 +536,7 @@ type=CoherentBus
 block_size=64
 clock=1000
 header_cycles=1
+system=system
 use_default_range=false
 width=8
 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
@@ -542,25 +544,28 @@ slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_m
 
 [system.physmem]
 type=SimpleDRAM
+activation_limit=4
 addr_mapping=openmap
 banks_per_rank=8
+channels=1
 clock=1000
 conf_table_reported=false
 in_addr_map=true
-lines_per_rowbuffer=64
-mem_sched_policy=fcfs
+lines_per_rowbuffer=32
+mem_sched_policy=frfcfs
 null=false
 page_policy=open
 range=0:134217727
 ranks_per_channel=2
 read_buffer_size=32
-tBURST=4000
-tCL=14000
-tRCD=14000
+tBURST=5000
+tCL=13750
+tRCD=13750
 tREFI=7800000
 tRFC=300000
-tRP=14000
-tWTR=1000
+tRP=13750
+tWTR=7500
+tXAW=40000
 write_buffer_size=32
 write_thresh_perc=70
 zero=false
-- 
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