From 85997e66a08b71d701e5b41462d1cfd42660b0c7 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Mon, 6 Jun 2016 17:16:44 +0100 Subject: stats: Add power stats to test references Change-Id: Ic827213134b199446822f128b81d4a480e777fee --- .../50.vortex/ref/alpha/tru64/o3-timing/stats.txt | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/o3-timing') diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt index 7587af834..a7431aca8 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.022275 # Nu sim_ticks 22275010500 # Number of ticks simulated final_tick 22275010500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 168633 # Simulator instruction rate (inst/s) -host_op_rate 168633 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 47194651 # Simulator tick rate (ticks/s) -host_mem_usage 258376 # Number of bytes of host memory used -host_seconds 471.98 # Real time elapsed on the host +host_inst_rate 330986 # Simulator instruction rate (inst/s) +host_op_rate 330986 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 92631737 # Simulator tick rate (ticks/s) +host_mem_usage 306452 # Number of bytes of host memory used +host_seconds 240.47 # Real time elapsed on the host sim_insts 79591756 # Number of instructions simulated sim_ops 79591756 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.physmem.bytes_read::cpu.inst 409984 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 10153216 # Number of bytes read from this memory system.physmem.bytes_read::total 10563200 # Number of bytes read from this memory @@ -279,6 +280,7 @@ system.physmem_1.memoryStateTime::REF 743600000 # Ti system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.physmem_1.memoryStateTime::ACT 9336732250 # Time in different power states system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.branchPred.lookups 16474744 # Number of BP lookups system.cpu.branchPred.condPredicted 10670267 # Number of conditional branches predicted system.cpu.branchPred.condIncorrect 324432 # Number of conditional branches incorrect @@ -326,6 +328,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4583 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 22275010500 # Cumulative time (in ticks) in various power states system.cpu.numCycles 44550025 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -620,6 +623,7 @@ system.cpu.fp_regfile_reads 255567 # nu system.cpu.fp_regfile_writes 240367 # number of floating regfile writes system.cpu.misc_regfile_reads 38271 # number of misc regfile reads system.cpu.misc_regfile_writes 1 # number of misc regfile writes +system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.dcache.tags.replacements 201418 # number of replacements system.cpu.dcache.tags.tagsinuse 4070.642288 # Cycle average of tags in use system.cpu.dcache.tags.total_refs 33984828 # Total number of references to valid blocks. @@ -636,6 +640,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::2 1244 system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id system.cpu.dcache.tags.tag_accesses 70818146 # Number of tag accesses system.cpu.dcache.tags.data_accesses 70818146 # Number of data accesses +system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.dcache.ReadReq_hits::cpu.data 20423642 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 20423642 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 13561123 # number of WriteReq hits @@ -736,6 +741,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 84920.081912 system.cpu.dcache.demand_avg_mshr_miss_latency::total 84920.081912 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 84920.081912 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::total 84920.081912 # average overall mshr miss latency +system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.icache.tags.replacements 90292 # number of replacements system.cpu.icache.tags.tagsinuse 1916.963164 # Cycle average of tags in use system.cpu.icache.tags.total_refs 13622372 # Total number of references to valid blocks. @@ -754,6 +760,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::4 384 system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id system.cpu.icache.tags.tag_accesses 27546828 # Number of tag accesses system.cpu.icache.tags.data_accesses 27546828 # Number of data accesses +system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.icache.ReadReq_hits::cpu.inst 13622372 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 13622372 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 13622372 # number of demand (read+write) hits @@ -828,6 +835,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 17004.672897 system.cpu.icache.demand_avg_mshr_miss_latency::total 17004.672897 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 17004.672897 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 17004.672897 # average overall mshr miss latency +system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.l2cache.tags.replacements 133082 # number of replacements system.cpu.l2cache.tags.tagsinuse 30595.837110 # Cycle average of tags in use system.cpu.l2cache.tags.total_refs 280630 # Total number of references to valid blocks. @@ -850,6 +858,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::4 54 system.cpu.l2cache.tags.occ_task_id_percent::1024 0.979401 # Percentage of cache occupancy per task id system.cpu.l2cache.tags.tag_accesses 5025086 # Number of tag accesses system.cpu.l2cache.tags.data_accesses 5025086 # Number of data accesses +system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.l2cache.WritebackDirty_hits::writebacks 168806 # number of WritebackDirty hits system.cpu.l2cache.WritebackDirty_hits::total 168806 # number of WritebackDirty hits system.cpu.l2cache.WritebackClean_hits::writebacks 90292 # number of WritebackClean hits @@ -996,6 +1005,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 system.cpu.toL2Bus.snoop_filter.tot_snoops 4045 # Total number of snoops made to the snoop filter. system.cpu.toL2Bus.snoop_filter.hit_single_snoops 4045 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.cpu.toL2Bus.trans_dist::ReadResp 154463 # Transaction distribution system.cpu.toL2Bus.trans_dist::WritebackDirty 283225 # Transaction distribution system.cpu.toL2Bus.trans_dist::WritebackClean 90292 # Transaction distribution @@ -1028,6 +1038,7 @@ system.cpu.toL2Bus.respLayer0.occupancy 138521976 # La system.cpu.toL2Bus.respLayer0.utilization 0.6 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 308281978 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.4 # Layer utilization (%) +system.membus.pwrStateResidencyTicks::UNDEFINED 22275010500 # Cumulative time (in ticks) in various power states system.membus.trans_dist::ReadResp 34270 # Transaction distribution system.membus.trans_dist::WritebackDirty 114419 # Transaction distribution system.membus.trans_dist::CleanEvict 14728 # Transaction distribution -- cgit v1.2.3