From 57e5401d954d46fea45ca3eaafa8ae655659da39 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Fri, 9 May 2014 18:58:50 -0400 Subject: stats: Bump stats for the fixes, and mostly DRAM controller changes --- .../70.twolf/ref/x86/linux/simple-timing/stats.txt | 45 +++++++++++++++++++--- 1 file changed, 40 insertions(+), 5 deletions(-) (limited to 'tests/long/se/70.twolf/ref/x86/linux/simple-timing') diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt index b4342fe40..9d2ef868e 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.250954 # Nu sim_ticks 250953957000 # Number of ticks simulated final_tick 250953957000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 770398 # Simulator instruction rate (inst/s) -host_op_rate 1291257 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1463865173 # Simulator tick rate (ticks/s) -host_mem_usage 276604 # Number of bytes of host memory used -host_seconds 171.43 # Real time elapsed on the host +host_inst_rate 652190 # Simulator instruction rate (inst/s) +host_op_rate 1093130 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1239252699 # Simulator tick rate (ticks/s) +host_mem_usage 313428 # Number of bytes of host memory used +host_seconds 202.50 # Real time elapsed on the host sim_insts 132071193 # Number of instructions simulated sim_ops 221363385 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -74,6 +74,41 @@ system.cpu.num_busy_cycles 501907914 # Nu system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 12326938 # Number of branches fetched +system.cpu.op_class::No_OpClass 1176721 0.53% 0.53% # Class of executed instruction +system.cpu.op_class::IntAlu 133863963 60.47% 61.00% # Class of executed instruction +system.cpu.op_class::IntMult 772953 0.35% 61.35% # Class of executed instruction +system.cpu.op_class::IntDiv 7031501 3.18% 64.53% # Class of executed instruction +system.cpu.op_class::FloatAdd 1352943 0.61% 65.14% # Class of executed instruction +system.cpu.op_class::FloatCmp 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::FloatCvt 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::FloatMult 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::FloatDiv 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::MemRead 56649587 25.59% 90.73% # Class of executed instruction +system.cpu.op_class::MemWrite 20515717 9.27% 100.00% # Class of executed instruction +system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::total 221363385 # Class of executed instruction system.cpu.icache.tags.replacements 2836 # number of replacements system.cpu.icache.tags.tagsinuse 1455.296642 # Cycle average of tags in use system.cpu.icache.tags.total_refs 173489674 # Total number of references to valid blocks. -- cgit v1.2.3