From b174ec065e2b9f8ffa68c350b2563819eef5e9b1 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Mon, 11 May 2009 10:38:46 -0700 Subject: ruby: Initial references for ruby regressions --- .../ref/alpha/linux/simple-timing-ruby/stats.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt (limited to 'tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt') diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt b/tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt new file mode 100644 index 000000000..8021d3d79 --- /dev/null +++ b/tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt @@ -0,0 +1,50 @@ + +---------- Begin Simulation Statistics ---------- +host_inst_rate 9868 # Simulator instruction rate (inst/s) +host_mem_usage 200140 # Number of bytes of host memory used +host_seconds 0.65 # Real time elapsed on the host +host_tick_rate 39112264 # Simulator tick rate (ticks/s) +sim_freq 1000000000000 # Frequency of simulated ticks +sim_insts 6404 # Number of instructions simulated +sim_seconds 0.000025 # Number of seconds simulated +sim_ticks 25390000 # Number of ticks simulated +system.cpu.dtb.data_accesses 2060 # DTB accesses +system.cpu.dtb.data_acv 0 # DTB access violations +system.cpu.dtb.data_hits 2050 # DTB hits +system.cpu.dtb.data_misses 10 # DTB misses +system.cpu.dtb.fetch_accesses 0 # ITB accesses +system.cpu.dtb.fetch_acv 0 # ITB acv +system.cpu.dtb.fetch_hits 0 # ITB hits +system.cpu.dtb.fetch_misses 0 # ITB misses +system.cpu.dtb.read_accesses 1192 # DTB read accesses +system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.read_hits 1185 # DTB read hits +system.cpu.dtb.read_misses 7 # DTB read misses +system.cpu.dtb.write_accesses 868 # DTB write accesses +system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.write_hits 865 # DTB write hits +system.cpu.dtb.write_misses 3 # DTB write misses +system.cpu.idle_fraction 0 # Percentage of idle cycles +system.cpu.itb.data_accesses 0 # DTB accesses +system.cpu.itb.data_acv 0 # DTB access violations +system.cpu.itb.data_hits 0 # DTB hits +system.cpu.itb.data_misses 0 # DTB misses +system.cpu.itb.fetch_accesses 6432 # ITB accesses +system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.itb.fetch_hits 6415 # ITB hits +system.cpu.itb.fetch_misses 17 # ITB misses +system.cpu.itb.read_accesses 0 # DTB read accesses +system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.read_hits 0 # DTB read hits +system.cpu.itb.read_misses 0 # DTB read misses +system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.write_hits 0 # DTB write hits +system.cpu.itb.write_misses 0 # DTB write misses +system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.numCycles 50780 # number of cpu cycles simulated +system.cpu.num_insts 6404 # Number of instructions executed +system.cpu.num_refs 2060 # Number of memory references +system.cpu.workload.PROG:num_syscalls 17 # Number of system calls + +---------- End Simulation Statistics ---------- -- cgit v1.2.3