From f7885b8f260ca11c2f4a405525d9fc4e554f41a8 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Tue, 18 Jan 2011 16:30:06 -0600 Subject: ARM/O3: Add regressions for ARM w/ O3 CPU. --- tests/quick/00.hello/ref/arm/linux/simple-timing/simout | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100755 tests/quick/00.hello/ref/arm/linux/simple-timing/simout (limited to 'tests/quick/00.hello/ref/arm/linux/simple-timing/simout') diff --git a/tests/quick/00.hello/ref/arm/linux/simple-timing/simout b/tests/quick/00.hello/ref/arm/linux/simple-timing/simout new file mode 100755 index 000000000..a1f858063 --- /dev/null +++ b/tests/quick/00.hello/ref/arm/linux/simple-timing/simout @@ -0,0 +1,16 @@ +M5 Simulator System + +Copyright (c) 2001-2008 +The Regents of The University of Michigan +All Rights Reserved + + +M5 compiled Dec 7 2010 18:51:32 +M5 revision 331c8c76d885 7806 default qtip tip ext/mismatched_new_delete.patch +M5 started Dec 7 2010 18:51:46 +M5 executing on u200439-lin.austin.arm.com +command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-timing +Global frequency set at 1000000000000 ticks per second +info: Entering event queue @ 0. Starting simulation... +Hello world! +Exiting @ tick 26346000 because target called exit() -- cgit v1.2.3