From a17dbdf8834b84f05a8f5154a74ac819fe8adc7c Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Wed, 25 Jan 2012 17:19:50 +0000
Subject: stats: Update stats for final tick and memory bandwidth patches

---
 .../alpha/linux/tsunami-simple-timing/config.ini   | 56 +++++++++++++++-------
 1 file changed, 38 insertions(+), 18 deletions(-)

(limited to 'tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini')

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
index 80db30395..54195aa23 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
@@ -15,6 +15,8 @@ init_param=0
 kernel=/dist/m5/system/binaries/vmlinux
 load_addr_mask=1099511627775
 mem_mode=timing
+memories=system.physmem
+num_work_ids=16
 pal=/dist/m5/system/binaries/ts_osfpal
 physmem=system.physmem
 readfile=tests/halt.sh
@@ -28,20 +30,18 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
+system_port=system.membus.port[2]
 
 [system.bridge]
 type=Bridge
 delay=50000
-filter_ranges_a=0:18446744073709551615
-filter_ranges_b=0:8589934591
 nack_delay=4000
-req_size_a=16
-req_size_b=16
-resp_size_a=16
-resp_size_b=16
+ranges=8796093022208:18446744073709551615
+req_size=16
+resp_size=16
 write_ack=false
-side_a=system.iobus.port[0]
-side_b=system.membus.port[0]
+master=system.iobus.port[0]
+slave=system.membus.port[0]
 
 [system.cpu]
 type=TimingSimpleCPU
@@ -202,7 +202,7 @@ header_cycles=1
 use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
-port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
+port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side
 
 [system.iocache]
 type=BaseCache
@@ -233,8 +233,8 @@ tgts_per_mshr=12
 trace_addr=0
 two_queue=false
 write_buffers=8
-cpu_side=system.iobus.port[28]
-mem_side=system.membus.port[2]
+cpu_side=system.iobus.port[32]
+mem_side=system.membus.port[3]
 
 [system.l2c]
 type=BaseCache
@@ -266,7 +266,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.toL2Bus.port[0]
-mem_side=system.membus.port[3]
+mem_side=system.membus.port[4]
 
 [system.membus]
 type=Bus
@@ -278,10 +278,11 @@ header_cycles=1
 use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
-port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
+port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side
 
 [system.membus.badaddr_responder]
 type=IsaFake
+fake_mem=false
 pio_addr=0
 pio_latency=1000
 pio_size=8
@@ -427,12 +428,13 @@ system=system
 tx_delay=1000000
 tx_fifo_size=524288
 tx_thread=false
-config=system.iobus.port[29]
-dma=system.iobus.port[30]
-pio=system.iobus.port[27]
+config=system.iobus.port[30]
+dma=system.iobus.port[31]
+pio=system.iobus.port[29]
 
 [system.tsunami.fake_OROM]
 type=IsaFake
+fake_mem=false
 pio_addr=8796093677568
 pio_latency=1000
 pio_size=393216
@@ -449,6 +451,7 @@ pio=system.iobus.port[9]
 
 [system.tsunami.fake_ata0]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848432
 pio_latency=1000
 pio_size=8
@@ -465,6 +468,7 @@ pio=system.iobus.port[20]
 
 [system.tsunami.fake_ata1]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848304
 pio_latency=1000
 pio_size=8
@@ -481,6 +485,7 @@ pio=system.iobus.port[21]
 
 [system.tsunami.fake_pnp_addr]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848569
 pio_latency=1000
 pio_size=8
@@ -497,6 +502,7 @@ pio=system.iobus.port[10]
 
 [system.tsunami.fake_pnp_read0]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848451
 pio_latency=1000
 pio_size=8
@@ -513,6 +519,7 @@ pio=system.iobus.port[12]
 
 [system.tsunami.fake_pnp_read1]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848515
 pio_latency=1000
 pio_size=8
@@ -529,6 +536,7 @@ pio=system.iobus.port[13]
 
 [system.tsunami.fake_pnp_read2]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848579
 pio_latency=1000
 pio_size=8
@@ -545,6 +553,7 @@ pio=system.iobus.port[14]
 
 [system.tsunami.fake_pnp_read3]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848643
 pio_latency=1000
 pio_size=8
@@ -561,6 +570,7 @@ pio=system.iobus.port[15]
 
 [system.tsunami.fake_pnp_read4]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848707
 pio_latency=1000
 pio_size=8
@@ -577,6 +587,7 @@ pio=system.iobus.port[16]
 
 [system.tsunami.fake_pnp_read5]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848771
 pio_latency=1000
 pio_size=8
@@ -593,6 +604,7 @@ pio=system.iobus.port[17]
 
 [system.tsunami.fake_pnp_read6]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848835
 pio_latency=1000
 pio_size=8
@@ -609,6 +621,7 @@ pio=system.iobus.port[18]
 
 [system.tsunami.fake_pnp_read7]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848899
 pio_latency=1000
 pio_size=8
@@ -625,6 +638,7 @@ pio=system.iobus.port[19]
 
 [system.tsunami.fake_pnp_write]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615850617
 pio_latency=1000
 pio_size=8
@@ -641,6 +655,7 @@ pio=system.iobus.port[11]
 
 [system.tsunami.fake_ppc]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848891
 pio_latency=1000
 pio_size=8
@@ -657,6 +672,7 @@ pio=system.iobus.port[8]
 
 [system.tsunami.fake_sm_chip]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848816
 pio_latency=1000
 pio_size=8
@@ -673,6 +689,7 @@ pio=system.iobus.port[3]
 
 [system.tsunami.fake_uart1]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848696
 pio_latency=1000
 pio_size=8
@@ -689,6 +706,7 @@ pio=system.iobus.port[4]
 
 [system.tsunami.fake_uart2]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848936
 pio_latency=1000
 pio_size=8
@@ -705,6 +723,7 @@ pio=system.iobus.port[5]
 
 [system.tsunami.fake_uart3]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848680
 pio_latency=1000
 pio_size=8
@@ -721,6 +740,7 @@ pio=system.iobus.port[6]
 
 [system.tsunami.fake_uart4]
 type=IsaFake
+fake_mem=false
 pio_addr=8804615848944
 pio_latency=1000
 pio_size=8
@@ -796,8 +816,8 @@ pci_func=0
 pio_latency=1000
 platform=system.tsunami
 system=system
-config=system.iobus.port[31]
-dma=system.iobus.port[32]
+config=system.iobus.port[27]
+dma=system.iobus.port[28]
 pio=system.iobus.port[26]
 
 [system.tsunami.io]
-- 
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