From 8c1563096c5aaf4123bf9ce5116aff3ce44dfd3b Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 19 Apr 2011 18:45:23 -0700 Subject: tests: update stats for name changes --- .../20.eio-short/ref/alpha/eio/simple-atomic/simout | 7 +++---- .../20.eio-short/ref/alpha/eio/simple-atomic/stats.txt | 10 +++++----- .../20.eio-short/ref/alpha/eio/simple-timing/config.ini | 3 +++ .../20.eio-short/ref/alpha/eio/simple-timing/simout | 7 +++---- .../20.eio-short/ref/alpha/eio/simple-timing/stats.txt | 16 ++++++++-------- 5 files changed, 22 insertions(+), 21 deletions(-) (limited to 'tests/quick/20.eio-short') diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout index 5ef0286ce..4c837ce08 100755 --- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout @@ -5,10 +5,9 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 7 2011 01:47:18 -M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip -M5 started Feb 7 2011 01:47:49 -M5 executing on burrito +M5 compiled Apr 19 2011 11:52:53 +M5 started Apr 19 2011 11:58:24 +M5 executing on maize command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt index e65e62021..aaf712409 100644 --- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1417565 # Simulator instruction rate (inst/s) -host_mem_usage 214360 # Number of bytes of host memory used -host_seconds 0.35 # Real time elapsed on the host -host_tick_rate 708232428 # Simulator tick rate (ticks/s) +host_inst_rate 5358491 # Simulator instruction rate (inst/s) +host_mem_usage 194108 # Number of bytes of host memory used +host_seconds 0.09 # Real time elapsed on the host +host_tick_rate 2674844665 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 500001 # Number of instructions simulated sim_seconds 0.000250 # Number of seconds simulated @@ -61,6 +61,6 @@ system.cpu.num_int_register_writes 371542 # nu system.cpu.num_load_insts 124443 # Number of load instructions system.cpu.num_mem_refs 180793 # number of memory refs system.cpu.num_store_insts 56350 # Number of store instructions -system.cpu.workload.PROG:num_syscalls 18 # Number of system calls +system.cpu.workload.num_syscalls 18 # Number of system calls ---------- End Simulation Statistics ---------- diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini index 466dd444b..5293d87cb 100644 --- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini @@ -51,6 +51,7 @@ assoc=2 block_size=64 forward_snoops=true hash_delay=1 +is_top_level=true latency=1000 max_miss_count=0 mshrs=10 @@ -86,6 +87,7 @@ assoc=2 block_size=64 forward_snoops=true hash_delay=1 +is_top_level=true latency=1000 max_miss_count=0 mshrs=10 @@ -121,6 +123,7 @@ assoc=2 block_size=64 forward_snoops=true hash_delay=1 +is_top_level=false latency=10000 max_miss_count=0 mshrs=10 diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout index 2fab9f5ba..596eb6dd7 100755 --- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout @@ -5,10 +5,9 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 7 2011 01:47:18 -M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip -M5 started Feb 7 2011 01:47:48 -M5 executing on burrito +M5 compiled Apr 19 2011 11:52:53 +M5 started Apr 19 2011 11:58:24 +M5 executing on maize command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt index 3dc7b5670..e27e0bfbf 100644 --- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 663064 # Simulator instruction rate (inst/s) -host_mem_usage 222076 # Number of bytes of host memory used -host_seconds 0.75 # Real time elapsed on the host -host_tick_rate 964960959 # Simulator tick rate (ticks/s) +host_inst_rate 2553874 # Simulator instruction rate (inst/s) +host_mem_usage 201796 # Number of bytes of host memory used +host_seconds 0.20 # Real time elapsed on the host +host_tick_rate 3714828011 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 500001 # Number of instructions simulated sim_seconds 0.000728 # Number of seconds simulated @@ -50,8 +50,8 @@ system.cpu.dcache.demand_mshr_misses 454 # nu system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.occ_%::0 0.070111 # Average percentage of cache occupancy system.cpu.dcache.occ_blocks::0 287.175167 # Average occupied blocks per context +system.cpu.dcache.occ_percent::0 0.070111 # Average percentage of cache occupancy system.cpu.dcache.overall_accesses 180775 # number of overall (read+write) accesses system.cpu.dcache.overall_avg_miss_latency 56000 # average overall miss latency system.cpu.dcache.overall_avg_mshr_miss_latency 53000 # average overall mshr miss latency @@ -121,8 +121,8 @@ system.cpu.icache.demand_mshr_misses 403 # nu system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.icache.occ_%::0 0.129371 # Average percentage of cache occupancy system.cpu.icache.occ_blocks::0 264.952126 # Average occupied blocks per context +system.cpu.icache.occ_percent::0 0.129371 # Average percentage of cache occupancy system.cpu.icache.overall_accesses 500020 # number of overall (read+write) accesses system.cpu.icache.overall_avg_miss_latency 56000 # average overall miss latency system.cpu.icache.overall_avg_mshr_miss_latency 53000 # average overall mshr miss latency @@ -201,8 +201,8 @@ system.cpu.l2cache.demand_mshr_misses 857 # nu system.cpu.l2cache.fast_writes 0 # number of fast writes performed system.cpu.l2cache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.occ_%::0 0.014692 # Average percentage of cache occupancy system.cpu.l2cache.occ_blocks::0 481.419470 # Average occupied blocks per context +system.cpu.l2cache.occ_percent::0 0.014692 # Average percentage of cache occupancy system.cpu.l2cache.overall_accesses 857 # number of overall (read+write) accesses system.cpu.l2cache.overall_avg_miss_latency 52000 # average overall miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency 40000 # average overall mshr miss latency @@ -244,6 +244,6 @@ system.cpu.num_int_register_writes 371542 # nu system.cpu.num_load_insts 124443 # Number of load instructions system.cpu.num_mem_refs 180793 # number of memory refs system.cpu.num_store_insts 56350 # Number of store instructions -system.cpu.workload.PROG:num_syscalls 18 # Number of system calls +system.cpu.workload.num_syscalls 18 # Number of system calls ---------- End Simulation Statistics ---------- -- cgit v1.2.3