From 0d6a6dfd7b500aff7e91a22c9bb7211e1807b90e Mon Sep 17 00:00:00 2001
From: Nilay Vaish <nilay@cs.wisc.edu>
Date: Tue, 15 Sep 2015 08:14:09 -0500
Subject: stats: updates due to recent changesets including d0934b57735a

---
 .../linux/tsunami-simple-timing-dual/config.ini    | 30 +++++++++-------------
 1 file changed, 12 insertions(+), 18 deletions(-)

(limited to 'tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini')

diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
index 6dd8362e8..e1d35dff5 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
@@ -94,7 +94,7 @@ dcache_port=system.cpu0.dcache.cpu_side
 icache_port=system.cpu0.icache.cpu_side
 
 [system.cpu0.dcache]
-type=BaseCache
+type=Cache
 children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
@@ -103,7 +103,7 @@ demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=2
-is_top_level=true
+is_read_only=false
 max_miss_count=0
 mshrs=4
 prefetch_on_access=false
@@ -114,7 +114,6 @@ size=32768
 system=system
 tags=system.cpu0.dcache.tags
 tgts_per_mshr=20
-two_queue=false
 write_buffers=8
 cpu_side=system.cpu0.dcache_port
 mem_side=system.toL2Bus.slave[1]
@@ -135,7 +134,7 @@ eventq_index=0
 size=64
 
 [system.cpu0.icache]
-type=BaseCache
+type=Cache
 children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
@@ -144,7 +143,7 @@ demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=2
-is_top_level=true
+is_read_only=true
 max_miss_count=0
 mshrs=4
 prefetch_on_access=false
@@ -155,7 +154,6 @@ size=32768
 system=system
 tags=system.cpu0.icache.tags
 tgts_per_mshr=20
-two_queue=false
 write_buffers=8
 cpu_side=system.cpu0.icache_port
 mem_side=system.toL2Bus.slave[0]
@@ -222,7 +220,7 @@ dcache_port=system.cpu1.dcache.cpu_side
 icache_port=system.cpu1.icache.cpu_side
 
 [system.cpu1.dcache]
-type=BaseCache
+type=Cache
 children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
@@ -231,7 +229,7 @@ demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=2
-is_top_level=true
+is_read_only=false
 max_miss_count=0
 mshrs=4
 prefetch_on_access=false
@@ -242,7 +240,6 @@ size=32768
 system=system
 tags=system.cpu1.dcache.tags
 tgts_per_mshr=20
-two_queue=false
 write_buffers=8
 cpu_side=system.cpu1.dcache_port
 mem_side=system.toL2Bus.slave[3]
@@ -263,7 +260,7 @@ eventq_index=0
 size=64
 
 [system.cpu1.icache]
-type=BaseCache
+type=Cache
 children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
@@ -272,7 +269,7 @@ demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=2
-is_top_level=true
+is_read_only=true
 max_miss_count=0
 mshrs=4
 prefetch_on_access=false
@@ -283,7 +280,6 @@ size=32768
 system=system
 tags=system.cpu1.icache.tags
 tgts_per_mshr=20
-two_queue=false
 write_buffers=8
 cpu_side=system.cpu1.icache_port
 mem_side=system.toL2Bus.slave[2]
@@ -397,7 +393,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_
 slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
 
 [system.iocache]
-type=BaseCache
+type=Cache
 children=tags
 addr_ranges=0:134217727
 assoc=8
@@ -406,7 +402,7 @@ demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=false
 hit_latency=50
-is_top_level=true
+is_read_only=false
 max_miss_count=0
 mshrs=20
 prefetch_on_access=false
@@ -417,7 +413,6 @@ size=1024
 system=system
 tags=system.iocache.tags
 tgts_per_mshr=12
-two_queue=false
 write_buffers=8
 cpu_side=system.iobus.master[29]
 mem_side=system.membus.slave[2]
@@ -433,7 +428,7 @@ sequential_access=false
 size=1024
 
 [system.l2c]
-type=BaseCache
+type=Cache
 children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
@@ -442,7 +437,7 @@ demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
 hit_latency=20
-is_top_level=false
+is_read_only=false
 max_miss_count=0
 mshrs=20
 prefetch_on_access=false
@@ -453,7 +448,6 @@ size=4194304
 system=system
 tags=system.l2c.tags
 tgts_per_mshr=12
-two_queue=false
 write_buffers=8
 cpu_side=system.toL2Bus.master[0]
 mem_side=system.membus.slave[1]
-- 
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