From 9bc132e4738c53be2dd9c2fdf5e4dd8e73d8970b Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Thu, 24 Jan 2013 12:29:00 -0600 Subject: regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables. --- .../linux/realview-simple-atomic-dual/config.ini | 10 +- .../arm/linux/realview-simple-atomic-dual/simout | 10 +- .../linux/realview-simple-atomic-dual/stats.txt | 46 ++-- .../arm/linux/realview-simple-atomic/config.ini | 244 +++++++++++---------- .../ref/arm/linux/realview-simple-atomic/simerr | 1 - .../ref/arm/linux/realview-simple-atomic/simout | 10 +- .../ref/arm/linux/realview-simple-atomic/stats.txt | 138 ++++++------ .../linux/realview-simple-timing-dual/config.ini | 10 +- .../arm/linux/realview-simple-timing-dual/simout | 10 +- .../linux/realview-simple-timing-dual/stats.txt | 46 ++-- .../arm/linux/realview-simple-timing/config.ini | 9 +- .../ref/arm/linux/realview-simple-timing/simout | 10 +- .../ref/arm/linux/realview-simple-timing/stats.txt | 34 +-- .../linux/realview-switcheroo-atomic/config.ini | 10 +- .../arm/linux/realview-switcheroo-atomic/simout | 10 +- .../arm/linux/realview-switcheroo-atomic/stats.txt | 10 +- 16 files changed, 318 insertions(+), 290 deletions(-) (limited to 'tests/quick/fs/10.linux-boot/ref/arm/linux') diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini index 9cf4fe14a..25f4e376e 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini @@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 cpu0 cpu1 intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver atags_addr=256 -boot_loader=/gem5/dist/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 clock=1000 dtb_filename= @@ -19,12 +19,12 @@ enable_context_switch_stats_dump=false flags_addr=268435504 gic_cpu_addr=520093952 init_param=0 -kernel=/gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=atomic mem_ranges=0:134217727 -memories=system.realview.nvmem system.physmem +memories=system.physmem system.realview.nvmem multi_proc=true num_work_ids=16 readfile=tests/halt.sh @@ -65,12 +65,13 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage -image_file=/gem5/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.cpu0] type=AtomicSimpleCPU children=dcache dtb icache interrupts isa itb tracer +branchPred=Null checker=Null clock=500 cpu_id=0 @@ -197,6 +198,7 @@ type=ExeTracer [system.cpu1] type=AtomicSimpleCPU children=dcache dtb icache interrupts isa itb tracer +branchPred=Null checker=Null clock=500 cpu_id=1 diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout index 4bb186944..c2890e671 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual/simout +Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 4 2013 21:17:24 -gem5 started Jan 4 2013 23:29:32 -gem5 executing on u200540 +gem5 compiled Jan 23 2013 19:43:25 +gem5 started Jan 23 2013 19:45:38 +gem5 executing on ribera.cs.wisc.edu command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual Global frequency set at 1000000000000 ticks per second -info: kernel located at: /gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 info: Using bootloader at address 0x80000000 info: Entering event queue @ 0. Starting simulation... Exiting @ tick 912096763500 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt index 362d16758..5fe42fc21 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt @@ -4,31 +4,13 @@ sim_seconds 0.912097 # Nu sim_ticks 912096763500 # Number of ticks simulated final_tick 912096763500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 599236 # Simulator instruction rate (inst/s) -host_op_rate 771515 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 8869004975 # Simulator tick rate (ticks/s) -host_mem_usage 384344 # Number of bytes of host memory used -host_seconds 102.84 # Real time elapsed on the host +host_inst_rate 1193297 # Simulator instruction rate (inst/s) +host_op_rate 1536367 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 17661410361 # Simulator tick rate (ticks/s) +host_mem_usage 435356 # Number of bytes of host memory used +host_seconds 51.64 # Real time elapsed on the host sim_insts 61625970 # Number of instructions simulated sim_ops 79343340 # Number of ops (including micro ops) simulated -system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory -system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory -system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory -system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory -system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory -system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory -system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory -system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory -system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory -system.realview.nvmem.bw_read::cpu0.inst 22 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_read::cpu1.inst 53 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_read::total 75 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::cpu0.inst 22 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::cpu1.inst 53 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::total 75 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_total::cpu0.inst 22 # Total bandwidth to/from this memory (bytes/s) -system.realview.nvmem.bw_total::cpu1.inst 53 # Total bandwidth to/from this memory (bytes/s) -system.realview.nvmem.bw_total::total 75 # Total bandwidth to/from this memory (bytes/s) system.physmem.bytes_read::realview.clcd 39321600 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.dtb.walker 64 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.itb.walker 192 # Number of bytes read from this memory @@ -242,6 +224,24 @@ system.physmem.writeRowHits 0 # Nu system.physmem.readRowHitRate nan # Row buffer hit rate for reads system.physmem.writeRowHitRate nan # Row buffer hit rate for writes system.physmem.avgGap nan # Average gap between requests +system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory +system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory +system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory +system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory +system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory +system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory +system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory +system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory +system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory +system.realview.nvmem.bw_read::cpu0.inst 22 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_read::cpu1.inst 53 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_read::total 75 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::cpu0.inst 22 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::cpu1.inst 53 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::total 75 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_total::cpu0.inst 22 # Total bandwidth to/from this memory (bytes/s) +system.realview.nvmem.bw_total::cpu1.inst 53 # Total bandwidth to/from this memory (bytes/s) +system.realview.nvmem.bw_total::total 75 # Total bandwidth to/from this memory (bytes/s) system.l2c.replacements 70658 # number of replacements system.l2c.tagsinuse 51560.149653 # Cycle average of tags in use system.l2c.total_refs 1623339 # Total number of references to valid blocks. diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini index 20da648f5..687db2fa1 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini @@ -8,22 +8,23 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 cpu intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver +children=bridge cf0 cpu intrctrl iobus iocache membus physmem realview terminal vncserver atags_addr=256 -boot_loader=/projects/pd/randd/dist/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 -clock=1 +clock=1000 dtb_filename= early_kernel_symbols=false +enable_context_switch_stats_dump=false flags_addr=268435504 gic_cpu_addr=520093952 init_param=0 -kernel=/projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=atomic +mem_ranges=0:134217727 memories=system.physmem system.realview.nvmem -midr_regval=890224640 multi_proc=true num_work_ids=16 readfile=tests/halt.sh @@ -39,7 +40,7 @@ system_port=system.membus.slave[0] [system.bridge] type=Bridge -clock=1 +clock=1000 delay=50000 ranges=268435456:520093695 1073741824:1610612735 req_size=16 @@ -64,16 +65,16 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage -image_file=/projects/pd/randd/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.cpu] type=AtomicSimpleCPU -children=dcache dtb icache interrupts itb tracer +children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer +branchPred=Null checker=Null clock=500 cpu_id=0 -defer_registration=false do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -82,6 +83,7 @@ fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu.interrupts +isa=system.cpu.isa itb=system.cpu.itb max_insts_all_threads=0 max_insts_any_thread=0 @@ -92,6 +94,7 @@ profile=0 progress_interval=0 simulate_data_stalls=false simulate_inst_stalls=false +switched_out=false system=system tracer=system.cpu.tracer width=1 @@ -104,27 +107,22 @@ type=BaseCache addr_ranges=0:18446744073709551615 assoc=4 block_size=64 -clock=1 +clock=500 forward_snoops=true -hash_delay=1 -hit_latency=1000 +hit_latency=2 is_top_level=true max_miss_count=0 mshrs=4 prefetch_on_access=false prefetcher=Null -prioritizeRequests=false -repl=Null -response_latency=1000 +response_latency=2 size=32768 -subblock_size=0 system=system -tgts_per_mshr=8 -trace_addr=0 +tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port -mem_side=system.toL2Bus.slave[1] +mem_side=system.cpu.toL2Bus.slave[1] [system.cpu.dtb] type=ArmTLB @@ -134,41 +132,53 @@ walker=system.cpu.dtb.walker [system.cpu.dtb.walker] type=ArmTableWalker -clock=1 +clock=500 num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[3] +port=system.cpu.toL2Bus.slave[3] [system.cpu.icache] type=BaseCache addr_ranges=0:18446744073709551615 assoc=1 block_size=64 -clock=1 +clock=500 forward_snoops=true -hash_delay=1 -hit_latency=1000 +hit_latency=2 is_top_level=true max_miss_count=0 mshrs=4 prefetch_on_access=false prefetcher=Null -prioritizeRequests=false -repl=Null -response_latency=1000 +response_latency=2 size=32768 -subblock_size=0 system=system -tgts_per_mshr=8 -trace_addr=0 +tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port -mem_side=system.toL2Bus.slave[0] +mem_side=system.cpu.toL2Bus.slave[0] [system.cpu.interrupts] type=ArmInterrupts +[system.cpu.isa] +type=ArmISA +fpsid=1090793632 +id_isar0=34607377 +id_isar1=34677009 +id_isar2=555950401 +id_isar3=17899825 +id_isar4=268501314 +id_isar5=0 +id_mmfr0=3 +id_mmfr1=0 +id_mmfr2=19070976 +id_mmfr3=4027589137 +id_pfr0=49 +id_pfr1=1 +midr=890224640 + [system.cpu.itb] type=ArmTLB children=walker @@ -177,10 +187,42 @@ walker=system.cpu.itb.walker [system.cpu.itb.walker] type=ArmTableWalker -clock=1 +clock=500 num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[2] +port=system.cpu.toL2Bus.slave[2] + +[system.cpu.l2cache] +type=BaseCache +addr_ranges=0:18446744073709551615 +assoc=8 +block_size=64 +clock=500 +forward_snoops=true +hit_latency=20 +is_top_level=false +max_miss_count=0 +mshrs=20 +prefetch_on_access=false +prefetcher=Null +response_latency=20 +size=4194304 +system=system +tgts_per_mshr=12 +two_queue=false +write_buffers=8 +cpu_side=system.cpu.toL2Bus.master[0] +mem_side=system.membus.slave[1] + +[system.cpu.toL2Bus] +type=CoherentBus +block_size=64 +clock=500 +header_cycles=1 +use_default_range=false +width=32 +master=system.cpu.l2cache.cpu_side +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -201,56 +243,24 @@ slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma [system.iocache] type=BaseCache -addr_ranges=0:268435455 +addr_ranges=0:134217727 assoc=8 block_size=64 -clock=1 +clock=1000 forward_snoops=false -hash_delay=1 -hit_latency=50000 -is_top_level=false +hit_latency=50 +is_top_level=true max_miss_count=0 mshrs=20 prefetch_on_access=false prefetcher=Null -prioritizeRequests=false -repl=Null -response_latency=50000 +response_latency=50 size=1024 -subblock_size=0 system=system tgts_per_mshr=12 -trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.iobus.master[25] -mem_side=system.membus.slave[1] - -[system.l2c] -type=BaseCache -addr_ranges=0:18446744073709551615 -assoc=8 -block_size=64 -clock=1 -forward_snoops=true -hash_delay=1 -hit_latency=10000 -is_top_level=false -max_miss_count=0 -mshrs=92 -prefetch_on_access=false -prefetcher=Null -prioritizeRequests=false -repl=Null -response_latency=10000 -size=4194304 -subblock_size=0 -system=system -tgts_per_mshr=16 -trace_addr=0 -two_queue=false -write_buffers=8 -cpu_side=system.toL2Bus.master[0] mem_side=system.membus.slave[2] [system.membus] @@ -263,11 +273,11 @@ use_default_range=false width=8 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.realview.nvmem.port system.physmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio -slave=system.system_port system.iocache.mem_side system.l2c.mem_side +slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side [system.membus.badaddr_responder] type=IsaFake -clock=1 +clock=1000 fake_mem=false pio_addr=0 pio_latency=100000 @@ -283,15 +293,28 @@ warn_access=warn pio=system.membus.default [system.physmem] -type=SimpleMemory -bandwidth=73.000000 -clock=1 +type=SimpleDRAM +addr_mapping=openmap +banks_per_rank=8 +clock=1000 conf_table_reported=true in_addr_map=true -latency=30000 -latency_var=0 +lines_per_rowbuffer=64 +mem_sched_policy=fcfs null=false +page_policy=open range=0:134217727 +ranks_per_channel=2 +read_buffer_size=32 +tBURST=4000 +tCL=14000 +tRCD=14000 +tREFI=7800000 +tRFC=300000 +tRP=14000 +tWTR=1000 +write_buffer_size=32 +write_thresh_perc=70 zero=false port=system.membus.master[2] @@ -306,7 +329,7 @@ system=system [system.realview.a9scu] type=A9SCU -clock=1 +clock=1000 pio_addr=520093696 pio_latency=100000 system=system @@ -315,7 +338,7 @@ pio=system.membus.master[5] [system.realview.aaci_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268451840 pio_latency=100000 @@ -362,7 +385,7 @@ SubClassCode=1 SubsystemID=0 SubsystemVendorID=0 VendorID=32902 -clock=1 +clock=1000 config_latency=20000 ctrl_offset=2 disks=system.cf0 @@ -380,11 +403,12 @@ pio=system.iobus.master[7] [system.realview.clcd] type=Pl111 amba_id=1315089 -clock=41667 +clock=1000 gic=system.realview.gic int_num=55 pio_addr=268566528 pio_latency=10000 +pixel_clock=41667 system=system vnc=system.vncserver dma=system.iobus.slave[1] @@ -393,7 +417,7 @@ pio=system.iobus.master[4] [system.realview.dmac_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268632064 pio_latency=100000 @@ -402,7 +426,7 @@ pio=system.iobus.master[9] [system.realview.flash_fake] type=IsaFake -clock=1 +clock=1000 fake_mem=true pio_addr=1073741824 pio_latency=100000 @@ -419,7 +443,7 @@ pio=system.iobus.master[24] [system.realview.gic] type=Gic -clock=1 +clock=1000 cpu_addr=520093952 cpu_pio_delay=10000 dist_addr=520097792 @@ -433,7 +457,7 @@ pio=system.membus.master[3] [system.realview.gpio0_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268513280 pio_latency=100000 @@ -443,7 +467,7 @@ pio=system.iobus.master[16] [system.realview.gpio1_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268517376 pio_latency=100000 @@ -453,7 +477,7 @@ pio=system.iobus.master[17] [system.realview.gpio2_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268521472 pio_latency=100000 @@ -463,7 +487,7 @@ pio=system.iobus.master[18] [system.realview.kmi0] type=Pl050 amba_id=1314896 -clock=1 +clock=1000 gic=system.realview.gic int_delay=1000000 int_num=52 @@ -477,7 +501,7 @@ pio=system.iobus.master[5] [system.realview.kmi1] type=Pl050 amba_id=1314896 -clock=1 +clock=1000 gic=system.realview.gic int_delay=1000000 int_num=53 @@ -490,7 +514,7 @@ pio=system.iobus.master[6] [system.realview.l2x0_fake] type=IsaFake -clock=1 +clock=1000 fake_mem=false pio_addr=520101888 pio_latency=100000 @@ -519,7 +543,7 @@ pio=system.membus.master[6] [system.realview.mmc_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268455936 pio_latency=100000 @@ -529,7 +553,7 @@ pio=system.iobus.master[22] [system.realview.nvmem] type=SimpleMemory bandwidth=73.000000 -clock=1 +clock=1000 conf_table_reported=false in_addr_map=true latency=30000 @@ -541,7 +565,7 @@ port=system.membus.master[1] [system.realview.realview_io] type=RealViewCtrl -clock=1 +clock=1000 idreg=0 pio_addr=268435456 pio_latency=100000 @@ -553,7 +577,7 @@ pio=system.iobus.master[1] [system.realview.rtc] type=PL031 amba_id=3412017 -clock=1 +clock=1000 gic=system.realview.gic int_delay=100000 int_num=42 @@ -566,7 +590,7 @@ pio=system.iobus.master[23] [system.realview.sci_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268492800 pio_latency=100000 @@ -576,7 +600,7 @@ pio=system.iobus.master[20] [system.realview.smc_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=269357056 pio_latency=100000 @@ -586,7 +610,7 @@ pio=system.iobus.master[13] [system.realview.sp810_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=true pio_addr=268439552 pio_latency=100000 @@ -596,7 +620,7 @@ pio=system.iobus.master[14] [system.realview.ssp_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268488704 pio_latency=100000 @@ -606,7 +630,7 @@ pio=system.iobus.master[19] [system.realview.timer0] type=Sp804 amba_id=1316868 -clock=1 +clock=1000 clock0=1000000 clock1=1000000 gic=system.realview.gic @@ -620,7 +644,7 @@ pio=system.iobus.master[2] [system.realview.timer1] type=Sp804 amba_id=1316868 -clock=1 +clock=1000 clock0=1000000 clock1=1000000 gic=system.realview.gic @@ -633,7 +657,7 @@ pio=system.iobus.master[3] [system.realview.uart] type=Pl011 -clock=1 +clock=1000 end_on_eot=false gic=system.realview.gic int_delay=100000 @@ -648,7 +672,7 @@ pio=system.iobus.master[0] [system.realview.uart1_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268476416 pio_latency=100000 @@ -658,7 +682,7 @@ pio=system.iobus.master[10] [system.realview.uart2_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268480512 pio_latency=100000 @@ -668,7 +692,7 @@ pio=system.iobus.master[11] [system.realview.uart3_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268484608 pio_latency=100000 @@ -678,7 +702,7 @@ pio=system.iobus.master[12] [system.realview.watchdog_fake] type=AmbaFake amba_id=0 -clock=1 +clock=1000 ignore_access=false pio_addr=268500992 pio_latency=100000 @@ -692,16 +716,6 @@ number=0 output=true port=3456 -[system.toL2Bus] -type=CoherentBus -block_size=64 -clock=1000 -header_cycles=1 -use_default_range=false -width=8 -master=system.l2c.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port - [system.vncserver] type=VncServer frame_capture=false diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr index 9a28ceb37..3ee89fc27 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr @@ -11,7 +11,6 @@ warn: instruction 'mcr dccimvac' unimplemented warn: instruction 'mcr dccmvau' unimplemented warn: instruction 'mcr icimvau' unimplemented warn: LCD dual screen mode not supported -warn: Returning thumbEE disabled for now since we don't support CP14config registers and jumping to ThumbEE vectors warn: instruction 'mcr icialluis' unimplemented warn: instruction 'mcr bpiallis' unimplemented hack: be nice to actually delete the event here diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout index 2d2abdc83..ec6b1ae21 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic/simout +Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 21 2012 11:19:00 -gem5 started Sep 21 2012 11:19:18 -gem5 executing on u200540-lin +gem5 compiled Jan 23 2013 19:43:25 +gem5 started Jan 23 2013 19:44:32 +gem5 executing on ribera.cs.wisc.edu command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic Global frequency set at 1000000000000 ticks per second -info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 info: Using bootloader at address 0x80000000 info: Entering event queue @ 0. Starting simulation... Exiting @ tick 2332810264000 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt index ccb9a5402..bc1e2b029 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.332810 # Nu sim_ticks 2332810264000 # Number of ticks simulated final_tick 2332810264000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1184768 # Simulator instruction rate (inst/s) -host_op_rate 1523538 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 45752340761 # Simulator tick rate (ticks/s) -host_mem_usage 382236 # Number of bytes of host memory used -host_seconds 50.99 # Real time elapsed on the host +host_inst_rate 1101050 # Simulator instruction rate (inst/s) +host_op_rate 1415882 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 42519386287 # Simulator tick rate (ticks/s) +host_mem_usage 435224 # Number of bytes of host memory used +host_seconds 54.86 # Real time elapsed on the host sim_insts 60408639 # Number of instructions simulated sim_ops 77681819 # Number of ops (including micro ops) simulated system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory @@ -333,70 +333,6 @@ system.cpu.icache.avg_blocked_cycles::no_targets nan system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.replacements 623337 # number of replacements -system.cpu.dcache.tagsinuse 511.997031 # Cycle average of tags in use -system.cpu.dcache.total_refs 23628343 # Total number of references to valid blocks. -system.cpu.dcache.sampled_refs 623849 # Sample count of references to valid blocks. -system.cpu.dcache.avg_refs 37.875100 # Average number of references to valid blocks. -system.cpu.dcache.warmup_cycle 21763000 # Cycle when the warmup percentage was hit. -system.cpu.dcache.occ_blocks::cpu.data 511.997031 # Average occupied blocks per requestor -system.cpu.dcache.occ_percent::cpu.data 0.999994 # Average percentage of cache occupancy -system.cpu.dcache.occ_percent::total 0.999994 # Average percentage of cache occupancy -system.cpu.dcache.ReadReq_hits::cpu.data 13180066 # number of ReadReq hits -system.cpu.dcache.ReadReq_hits::total 13180066 # number of ReadReq hits -system.cpu.dcache.WriteReq_hits::cpu.data 9962072 # number of WriteReq hits -system.cpu.dcache.WriteReq_hits::total 9962072 # number of WriteReq hits -system.cpu.dcache.LoadLockedReq_hits::cpu.data 236039 # number of LoadLockedReq hits -system.cpu.dcache.LoadLockedReq_hits::total 236039 # number of LoadLockedReq hits -system.cpu.dcache.StoreCondReq_hits::cpu.data 247221 # number of StoreCondReq hits -system.cpu.dcache.StoreCondReq_hits::total 247221 # number of StoreCondReq hits -system.cpu.dcache.demand_hits::cpu.data 23142138 # number of demand (read+write) hits -system.cpu.dcache.demand_hits::total 23142138 # number of demand (read+write) hits -system.cpu.dcache.overall_hits::cpu.data 23142138 # number of overall hits -system.cpu.dcache.overall_hits::total 23142138 # number of overall hits -system.cpu.dcache.ReadReq_misses::cpu.data 365459 # number of ReadReq misses -system.cpu.dcache.ReadReq_misses::total 365459 # number of ReadReq misses -system.cpu.dcache.WriteReq_misses::cpu.data 250152 # number of WriteReq misses -system.cpu.dcache.WriteReq_misses::total 250152 # number of WriteReq misses -system.cpu.dcache.LoadLockedReq_misses::cpu.data 11183 # number of LoadLockedReq misses -system.cpu.dcache.LoadLockedReq_misses::total 11183 # number of LoadLockedReq misses -system.cpu.dcache.demand_misses::cpu.data 615611 # number of demand (read+write) misses -system.cpu.dcache.demand_misses::total 615611 # number of demand (read+write) misses -system.cpu.dcache.overall_misses::cpu.data 615611 # number of overall misses -system.cpu.dcache.overall_misses::total 615611 # number of overall misses -system.cpu.dcache.ReadReq_accesses::cpu.data 13545525 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.ReadReq_accesses::total 13545525 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.WriteReq_accesses::cpu.data 10212224 # number of WriteReq accesses(hits+misses) -system.cpu.dcache.WriteReq_accesses::total 10212224 # number of WriteReq accesses(hits+misses) -system.cpu.dcache.LoadLockedReq_accesses::cpu.data 247222 # number of LoadLockedReq accesses(hits+misses) -system.cpu.dcache.LoadLockedReq_accesses::total 247222 # number of LoadLockedReq accesses(hits+misses) -system.cpu.dcache.StoreCondReq_accesses::cpu.data 247221 # number of StoreCondReq accesses(hits+misses) -system.cpu.dcache.StoreCondReq_accesses::total 247221 # number of StoreCondReq accesses(hits+misses) -system.cpu.dcache.demand_accesses::cpu.data 23757749 # number of demand (read+write) accesses -system.cpu.dcache.demand_accesses::total 23757749 # number of demand (read+write) accesses -system.cpu.dcache.overall_accesses::cpu.data 23757749 # number of overall (read+write) accesses -system.cpu.dcache.overall_accesses::total 23757749 # number of overall (read+write) accesses -system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.026980 # miss rate for ReadReq accesses -system.cpu.dcache.ReadReq_miss_rate::total 0.026980 # miss rate for ReadReq accesses -system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.024495 # miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_miss_rate::total 0.024495 # miss rate for WriteReq accesses -system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.045235 # miss rate for LoadLockedReq accesses -system.cpu.dcache.LoadLockedReq_miss_rate::total 0.045235 # miss rate for LoadLockedReq accesses -system.cpu.dcache.demand_miss_rate::cpu.data 0.025912 # miss rate for demand accesses -system.cpu.dcache.demand_miss_rate::total 0.025912 # miss rate for demand accesses -system.cpu.dcache.overall_miss_rate::cpu.data 0.025912 # miss rate for overall accesses -system.cpu.dcache.overall_miss_rate::total 0.025912 # miss rate for overall accesses -system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked -system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked -system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked -system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked -system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked -system.cpu.dcache.fast_writes 0 # number of fast writes performed -system.cpu.dcache.cache_copies 0 # number of cache copies performed -system.cpu.dcache.writebacks::writebacks 592643 # number of writebacks -system.cpu.dcache.writebacks::total 592643 # number of writebacks -system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate system.cpu.l2cache.replacements 62243 # number of replacements system.cpu.l2cache.tagsinuse 50007.272909 # Cycle average of tags in use system.cpu.l2cache.total_refs 1669922 # Total number of references to valid blocks. @@ -505,6 +441,70 @@ system.cpu.l2cache.cache_copies 0 # nu system.cpu.l2cache.writebacks::writebacks 57863 # number of writebacks system.cpu.l2cache.writebacks::total 57863 # number of writebacks system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate +system.cpu.dcache.replacements 623337 # number of replacements +system.cpu.dcache.tagsinuse 511.997031 # Cycle average of tags in use +system.cpu.dcache.total_refs 23628343 # Total number of references to valid blocks. +system.cpu.dcache.sampled_refs 623849 # Sample count of references to valid blocks. +system.cpu.dcache.avg_refs 37.875100 # Average number of references to valid blocks. +system.cpu.dcache.warmup_cycle 21763000 # Cycle when the warmup percentage was hit. +system.cpu.dcache.occ_blocks::cpu.data 511.997031 # Average occupied blocks per requestor +system.cpu.dcache.occ_percent::cpu.data 0.999994 # Average percentage of cache occupancy +system.cpu.dcache.occ_percent::total 0.999994 # Average percentage of cache occupancy +system.cpu.dcache.ReadReq_hits::cpu.data 13180066 # number of ReadReq hits +system.cpu.dcache.ReadReq_hits::total 13180066 # number of ReadReq hits +system.cpu.dcache.WriteReq_hits::cpu.data 9962072 # number of WriteReq hits +system.cpu.dcache.WriteReq_hits::total 9962072 # number of WriteReq hits +system.cpu.dcache.LoadLockedReq_hits::cpu.data 236039 # number of LoadLockedReq hits +system.cpu.dcache.LoadLockedReq_hits::total 236039 # number of LoadLockedReq hits +system.cpu.dcache.StoreCondReq_hits::cpu.data 247221 # number of StoreCondReq hits +system.cpu.dcache.StoreCondReq_hits::total 247221 # number of StoreCondReq hits +system.cpu.dcache.demand_hits::cpu.data 23142138 # number of demand (read+write) hits +system.cpu.dcache.demand_hits::total 23142138 # number of demand (read+write) hits +system.cpu.dcache.overall_hits::cpu.data 23142138 # number of overall hits +system.cpu.dcache.overall_hits::total 23142138 # number of overall hits +system.cpu.dcache.ReadReq_misses::cpu.data 365459 # number of ReadReq misses +system.cpu.dcache.ReadReq_misses::total 365459 # number of ReadReq misses +system.cpu.dcache.WriteReq_misses::cpu.data 250152 # number of WriteReq misses +system.cpu.dcache.WriteReq_misses::total 250152 # number of WriteReq misses +system.cpu.dcache.LoadLockedReq_misses::cpu.data 11183 # number of LoadLockedReq misses +system.cpu.dcache.LoadLockedReq_misses::total 11183 # number of LoadLockedReq misses +system.cpu.dcache.demand_misses::cpu.data 615611 # number of demand (read+write) misses +system.cpu.dcache.demand_misses::total 615611 # number of demand (read+write) misses +system.cpu.dcache.overall_misses::cpu.data 615611 # number of overall misses +system.cpu.dcache.overall_misses::total 615611 # number of overall misses +system.cpu.dcache.ReadReq_accesses::cpu.data 13545525 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.ReadReq_accesses::total 13545525 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.WriteReq_accesses::cpu.data 10212224 # number of WriteReq accesses(hits+misses) +system.cpu.dcache.WriteReq_accesses::total 10212224 # number of WriteReq accesses(hits+misses) +system.cpu.dcache.LoadLockedReq_accesses::cpu.data 247222 # number of LoadLockedReq accesses(hits+misses) +system.cpu.dcache.LoadLockedReq_accesses::total 247222 # number of LoadLockedReq accesses(hits+misses) +system.cpu.dcache.StoreCondReq_accesses::cpu.data 247221 # number of StoreCondReq accesses(hits+misses) +system.cpu.dcache.StoreCondReq_accesses::total 247221 # number of StoreCondReq accesses(hits+misses) +system.cpu.dcache.demand_accesses::cpu.data 23757749 # number of demand (read+write) accesses +system.cpu.dcache.demand_accesses::total 23757749 # number of demand (read+write) accesses +system.cpu.dcache.overall_accesses::cpu.data 23757749 # number of overall (read+write) accesses +system.cpu.dcache.overall_accesses::total 23757749 # number of overall (read+write) accesses +system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.026980 # miss rate for ReadReq accesses +system.cpu.dcache.ReadReq_miss_rate::total 0.026980 # miss rate for ReadReq accesses +system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.024495 # miss rate for WriteReq accesses +system.cpu.dcache.WriteReq_miss_rate::total 0.024495 # miss rate for WriteReq accesses +system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.045235 # miss rate for LoadLockedReq accesses +system.cpu.dcache.LoadLockedReq_miss_rate::total 0.045235 # miss rate for LoadLockedReq accesses +system.cpu.dcache.demand_miss_rate::cpu.data 0.025912 # miss rate for demand accesses +system.cpu.dcache.demand_miss_rate::total 0.025912 # miss rate for demand accesses +system.cpu.dcache.overall_miss_rate::cpu.data 0.025912 # miss rate for overall accesses +system.cpu.dcache.overall_miss_rate::total 0.025912 # miss rate for overall accesses +system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked +system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked +system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked +system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked +system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked +system.cpu.dcache.fast_writes 0 # number of fast writes performed +system.cpu.dcache.cache_copies 0 # number of cache copies performed +system.cpu.dcache.writebacks::writebacks 592643 # number of writebacks +system.cpu.dcache.writebacks::total 592643 # number of writebacks +system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate system.iocache.replacements 0 # number of replacements system.iocache.tagsinuse 0 # Cycle average of tags in use system.iocache.total_refs 0 # Total number of references to valid blocks. diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini index 8e8c112af..88cdb89c6 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini @@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 cpu0 cpu1 intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver atags_addr=256 -boot_loader=/gem5/dist/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 clock=1000 dtb_filename= @@ -19,12 +19,12 @@ enable_context_switch_stats_dump=false flags_addr=268435504 gic_cpu_addr=520093952 init_param=0 -kernel=/gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=timing mem_ranges=0:134217727 -memories=system.realview.nvmem system.physmem +memories=system.physmem system.realview.nvmem multi_proc=true num_work_ids=16 readfile=tests/halt.sh @@ -65,12 +65,13 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage -image_file=/gem5/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.cpu0] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb tracer +branchPred=Null checker=Null clock=500 cpu_id=0 @@ -193,6 +194,7 @@ type=ExeTracer [system.cpu1] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb tracer +branchPred=Null checker=Null clock=500 cpu_id=1 diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout index cecfd8ad7..97bbe0010 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual/simout +Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 4 2013 21:17:24 -gem5 started Jan 4 2013 23:31:36 -gem5 executing on u200540 +gem5 compiled Jan 23 2013 19:43:25 +gem5 started Jan 23 2013 19:46:40 +gem5 executing on ribera.cs.wisc.edu command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual Global frequency set at 1000000000000 ticks per second -info: kernel located at: /gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 info: Using bootloader at address 0x80000000 info: Entering event queue @ 0. Starting simulation... Exiting @ tick 1182882156500 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt index b637311d9..ebe1b98fa 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt @@ -4,31 +4,13 @@ sim_seconds 1.182882 # Nu sim_ticks 1182882156500 # Number of ticks simulated final_tick 1182882156500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 184229 # Simulator instruction rate (inst/s) -host_op_rate 234741 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 3546252898 # Simulator tick rate (ticks/s) -host_mem_usage 402168 # Number of bytes of host memory used -host_seconds 333.56 # Real time elapsed on the host +host_inst_rate 497131 # Simulator instruction rate (inst/s) +host_op_rate 633435 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 9569364300 # Simulator tick rate (ticks/s) +host_mem_usage 452888 # Number of bytes of host memory used +host_seconds 123.61 # Real time elapsed on the host sim_insts 61450993 # Number of instructions simulated sim_ops 78299715 # Number of ops (including micro ops) simulated -system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory -system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory -system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory -system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory -system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory -system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory -system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory -system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory -system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory -system.realview.nvmem.bw_read::cpu0.inst 17 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_read::cpu1.inst 41 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_read::total 57 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::cpu0.inst 17 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::cpu1.inst 41 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::total 57 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_total::cpu0.inst 17 # Total bandwidth to/from this memory (bytes/s) -system.realview.nvmem.bw_total::cpu1.inst 41 # Total bandwidth to/from this memory (bytes/s) -system.realview.nvmem.bw_total::total 57 # Total bandwidth to/from this memory (bytes/s) system.physmem.bytes_read::realview.clcd 51904512 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.dtb.walker 64 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.itb.walker 128 # Number of bytes read from this memory @@ -242,6 +224,24 @@ system.physmem.writeRowHits 789308 # Nu system.physmem.readRowHitRate 99.61 # Row buffer hit rate for reads system.physmem.writeRowHitRate 96.12 # Row buffer hit rate for writes system.physmem.avgGap 158232.25 # Average gap between requests +system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory +system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory +system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory +system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory +system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory +system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory +system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory +system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory +system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory +system.realview.nvmem.bw_read::cpu0.inst 17 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_read::cpu1.inst 41 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_read::total 57 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::cpu0.inst 17 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::cpu1.inst 41 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::total 57 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_total::cpu0.inst 17 # Total bandwidth to/from this memory (bytes/s) +system.realview.nvmem.bw_total::cpu1.inst 41 # Total bandwidth to/from this memory (bytes/s) +system.realview.nvmem.bw_total::total 57 # Total bandwidth to/from this memory (bytes/s) system.l2c.replacements 69442 # number of replacements system.l2c.tagsinuse 53039.972087 # Cycle average of tags in use system.l2c.total_refs 1672967 # Total number of references to valid blocks. diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini index eecdc36d4..f1513514e 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini @@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 cpu intrctrl iobus iocache membus physmem realview terminal vncserver atags_addr=256 -boot_loader=/gem5/dist/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 clock=1000 dtb_filename= @@ -19,12 +19,12 @@ enable_context_switch_stats_dump=false flags_addr=268435504 gic_cpu_addr=520093952 init_param=0 -kernel=/gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=timing mem_ranges=0:134217727 -memories=system.realview.nvmem system.physmem +memories=system.physmem system.realview.nvmem multi_proc=true num_work_ids=16 readfile=tests/halt.sh @@ -65,12 +65,13 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage -image_file=/gem5/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer +branchPred=Null checker=Null clock=500 cpu_id=0 diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout index fedaf9185..a83c8cf44 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing/simout +Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 4 2013 21:17:24 -gem5 started Jan 4 2013 23:31:27 -gem5 executing on u200540 +gem5 compiled Jan 23 2013 19:43:25 +gem5 started Jan 23 2013 19:45:50 +gem5 executing on ribera.cs.wisc.edu command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing Global frequency set at 1000000000000 ticks per second -info: kernel located at: /gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 info: Using bootloader at address 0x80000000 info: Entering event queue @ 0. Starting simulation... Exiting @ tick 2603634694000 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt index fcb402e49..b72126c20 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt @@ -4,25 +4,13 @@ sim_seconds 2.603635 # Nu sim_ticks 2603634694000 # Number of ticks simulated final_tick 2603634694000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 156094 # Simulator instruction rate (inst/s) -host_op_rate 198627 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 6751306864 # Simulator tick rate (ticks/s) -host_mem_usage 397752 # Number of bytes of host memory used -host_seconds 385.65 # Real time elapsed on the host +host_inst_rate 413538 # Simulator instruction rate (inst/s) +host_op_rate 526220 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 17886148072 # Simulator tick rate (ticks/s) +host_mem_usage 448796 # Number of bytes of host memory used +host_seconds 145.57 # Real time elapsed on the host sim_insts 60197457 # Number of instructions simulated sim_ops 76600355 # Number of ops (including micro ops) simulated -system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory -system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory -system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory -system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory -system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory -system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory -system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s) -system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s) system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory system.physmem.bytes_read::cpu.itb.walker 192 # Number of bytes read from this memory @@ -219,6 +207,18 @@ system.physmem.writeRowHits 785061 # Nu system.physmem.readRowHitRate 99.73 # Row buffer hit rate for reads system.physmem.writeRowHitRate 96.74 # Row buffer hit rate for writes system.physmem.avgGap 159677.30 # Average gap between requests +system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory +system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory +system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory +system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory +system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory +system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory +system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s) +system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s) system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/config.ini index a1eb19238..e3b4a020a 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/config.ini @@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 cpu0 cpu1 intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver atags_addr=256 -boot_loader=/arm/scratch/sysexplr/dist/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 clock=1000 dtb_filename= @@ -19,7 +19,7 @@ enable_context_switch_stats_dump=false flags_addr=268435504 gic_cpu_addr=520093952 init_param=0 -kernel=/arm/scratch/sysexplr/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=atomic @@ -27,8 +27,6 @@ mem_ranges=0:134217727 memories=system.physmem system.realview.nvmem multi_proc=true num_work_ids=16 -panic_on_oops=true -panic_on_panic=true readfile=tests/halt.sh symbolfile= work_begin_ckpt_count=0 @@ -67,12 +65,13 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage -image_file=/arm/scratch/sysexplr/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.cpu0] type=AtomicSimpleCPU children=dcache dtb icache interrupts isa itb tracer +branchPred=Null checker=Null clock=500 cpu_id=0 @@ -199,6 +198,7 @@ type=ExeTracer [system.cpu1] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer +branchPred=Null checker=Null clock=500 cpu_id=0 diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/simout b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/simout index 19928f0ac..ac14d4997 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/simout +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/simout @@ -1,12 +1,14 @@ +Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic/simout +Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Dec 11 2012 16:28:23 -gem5 started Dec 11 2012 16:28:36 -gem5 executing on e103721-lin +gem5 compiled Jan 23 2013 19:43:25 +gem5 started Jan 23 2013 19:48:26 +gem5 executing on ribera.cs.wisc.edu command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic Global frequency set at 1000000000000 ticks per second -info: kernel located at: /arm/scratch/sysexplr/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 info: Using bootloader at address 0x80000000 info: Entering event queue @ 0. Starting simulation... Switching CPUs... diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/stats.txt index d4e639ad7..21a80bd51 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.332810 # Nu sim_ticks 2332810256000 # Number of ticks simulated final_tick 2332810256000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 669803 # Simulator instruction rate (inst/s) -host_op_rate 861325 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 25865872844 # Simulator tick rate (ticks/s) -host_mem_usage 384756 # Number of bytes of host memory used -host_seconds 90.19 # Real time elapsed on the host +host_inst_rate 1011951 # Simulator instruction rate (inst/s) +host_op_rate 1301307 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 39078665084 # Simulator tick rate (ticks/s) +host_mem_usage 435224 # Number of bytes of host memory used +host_seconds 59.70 # Real time elapsed on the host sim_insts 60408639 # Number of instructions simulated sim_ops 77681819 # Number of ops (including micro ops) simulated system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory -- cgit v1.2.3