From f3585c841e964c98911784a187fc4f081a02a0a6 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 24 Jan 2014 15:29:33 -0600 Subject: stats: update stats for cache occupancy and clock domain changes --- .../00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt') diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt index 6d4e698a8..19e4fff41 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt @@ -4,13 +4,16 @@ sim_seconds 0.000144 # Nu sim_ticks 143853 # Number of ticks simulated final_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 26416 # Simulator instruction rate (inst/s) -host_op_rate 26414 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 594577 # Simulator tick rate (ticks/s) -host_mem_usage 170576 # Number of bytes of host memory used -host_seconds 0.24 # Real time elapsed on the host +host_inst_rate 41580 # Simulator instruction rate (inst/s) +host_op_rate 41576 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 935887 # Simulator tick rate (ticks/s) +host_mem_usage 126996 # Number of bytes of host memory used +host_seconds 0.15 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1 # Clock period in ticks +system.ruby.clk_domain.clock 1 # Clock period in ticks system.ruby.delayHist::bucket_size 1 # delay histogram for all message system.ruby.delayHist::max_bucket 9 # delay histogram for all message system.ruby.delayHist::samples 3456 # delay histogram for all message @@ -47,6 +50,7 @@ system.ruby.miss_latency_hist::stdev 7.725779 system.ruby.miss_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 336 19.42% 19.42% | 1251 72.31% 91.73% | 136 7.86% 99.60% | 5 0.29% 99.88% | 2 0.12% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.miss_latency_hist::total 1730 system.ruby.Directory.incomplete_times 1729 +system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks system.ruby.l1_cntrl0.cacheMemory.demand_hits 6718 # Number of cache demand hits system.ruby.l1_cntrl0.cacheMemory.demand_misses 1730 # Number of cache demand misses system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8448 # Number of cache demand accesses @@ -99,6 +103,7 @@ system.ruby.network.msg_byte.Control 41520 system.ruby.network.msg_byte.Data 372816 system.ruby.network.msg_byte.Response_Data 373680 system.ruby.network.msg_byte.Writeback_Control 41424 +system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv -- cgit v1.2.3