From 9d8fec0d90c2121a092c04da74e3306069ab5270 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Thu, 17 Mar 2016 10:25:11 -0700 Subject: stats: update stats for mmap() change. SE O3 runs see an additional reg read per mmap() call. --- .../se/00.hello/ref/arm/linux/o3-timing-checker/config.ini | 7 +++---- .../quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout | 8 ++++---- .../se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt | 12 ++++++------ 3 files changed, 13 insertions(+), 14 deletions(-) (limited to 'tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker') diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini index 14812c152..0ad30e5d6 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini @@ -314,7 +314,6 @@ clk_domain=system.cpu_clk_domain clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=2 is_read_only=false max_miss_count=0 @@ -699,7 +698,6 @@ clk_domain=system.cpu_clk_domain clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=2 is_read_only=true max_miss_count=0 @@ -812,7 +810,6 @@ clk_domain=system.cpu_clk_domain clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=20 is_read_only=false max_miss_count=0 @@ -847,6 +844,7 @@ clk_domain=system.cpu_clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 +point_of_coherency=false response_latency=1 snoop_filter=system.cpu.toL2Bus.snoop_filter snoop_response_latency=1 @@ -877,7 +875,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello +executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin kvmInSE=false @@ -912,6 +910,7 @@ clk_domain=system.clk_domain eventq_index=0 forward_latency=4 frontend_latency=3 +point_of_coherency=true response_latency=2 snoop_filter=Null snoop_response_latency=4 diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout index 4acd461b9..3c6706440 100755 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout @@ -1,10 +1,10 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 21 2016 14:45:42 -gem5 started Jan 21 2016 14:46:34 -gem5 executing on zizzer, pid 20759 -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /z/atgutier/gem5/gem5-commit/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker +gem5 compiled Mar 13 2016 22:35:59 +gem5 started Mar 13 2016 22:47:14 +gem5 executing on phenom, pid 19877 +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt index f429492e1..8c3704b45 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000017 # Nu sim_ticks 17170000 # Number of ticks simulated final_tick 17170000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 56453 # Simulator instruction rate (inst/s) -host_op_rate 66106 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 211025109 # Simulator tick rate (ticks/s) -host_mem_usage 270504 # Number of bytes of host memory used -host_seconds 0.08 # Real time elapsed on the host +host_inst_rate 9367 # Simulator instruction rate (inst/s) +host_op_rate 10970 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 35022410 # Simulator tick rate (ticks/s) +host_mem_usage 245324 # Number of bytes of host memory used +host_seconds 0.49 # Real time elapsed on the host sim_insts 4592 # Number of instructions simulated sim_ops 5378 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -781,7 +781,7 @@ system.cpu.cpi 7.478441 # CP system.cpu.cpi_total 7.478441 # CPI: Total CPI of All Threads system.cpu.ipc 0.133718 # IPC: Instructions Per Cycle system.cpu.ipc_total 0.133718 # IPC: Total IPC of All Threads -system.cpu.int_regfile_reads 7636 # number of integer regfile reads +system.cpu.int_regfile_reads 7637 # number of integer regfile reads system.cpu.int_regfile_writes 4176 # number of integer regfile writes system.cpu.fp_regfile_reads 32 # number of floating regfile reads system.cpu.cc_regfile_reads 27387 # number of cc regfile reads -- cgit v1.2.3